upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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1649 lines
44 KiB
1649 lines
44 KiB
/*
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* URB OHCI HCD (Host Controller Driver) for USB on the MPC5200.
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*
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* (C) Copyright 2003-2004
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* Gary Jennejohn, DENX Software Engineering <gj@denx.de>
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*
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* (C) Copyright 2004
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* Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
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*
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* Note: Much of this code has been derived from Linux 2.4
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* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
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* (C) Copyright 2000-2002 David Brownell
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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/*
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* IMPORTANT NOTES
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* 1 - this driver is intended for use with USB Mass Storage Devices
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* (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
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*/
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#include <common.h>
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#ifdef CONFIG_USB_OHCI
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#include <malloc.h>
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#include <usb.h>
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#include "usb_ohci.h"
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#include <mpc5xxx.h>
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#define OHCI_USE_NPS /* force NoPowerSwitching mode */
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#undef OHCI_VERBOSE_DEBUG /* not always helpful */
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#undef DEBUG
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#undef SHOW_INFO
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#undef OHCI_FILL_TRACE
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/* For initializing controller (mask in an HCFS mode too) */
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#define OHCI_CONTROL_INIT \
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(OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
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#define readl(a) (*((volatile u32 *)(a)))
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#define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
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#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
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#ifdef DEBUG
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#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
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#else
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#define dbg(format, arg...) do {} while(0)
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#endif /* DEBUG */
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#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
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#ifdef SHOW_INFO
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#define info(format, arg...) printf("INFO: " format "\n", ## arg)
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#else
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#define info(format, arg...) do {} while(0)
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#endif
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#define m16_swap(x) swap_16(x)
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#define m32_swap(x) swap_32(x)
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#ifdef CONFIG_MPC5200
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#define ohci_cpu_to_le16(x) (x)
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#define ohci_cpu_to_le32(x) (x)
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#else
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#define ohci_cpu_to_le16(x) swap_16(x)
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#define ohci_cpu_to_le32(x) swap_32(x)
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#endif
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/* global ohci_t */
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static ohci_t gohci;
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/* this must be aligned to a 256 byte boundary */
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struct ohci_hcca ghcca[1];
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/* a pointer to the aligned storage */
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struct ohci_hcca *phcca;
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/* this allocates EDs for all possible endpoints */
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struct ohci_device ohci_dev;
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/* urb_priv */
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urb_priv_t urb_priv;
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/* RHSC flag */
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int got_rhsc;
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/* device which was disconnected */
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struct usb_device *devgone;
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/* flag guarding URB transation */
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int urb_finished = 0;
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/*-------------------------------------------------------------------------*/
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/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
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* The erratum (#4) description is incorrect. AMD's workaround waits
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* till some bits (mostly reserved) are clear; ok for all revs.
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*/
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#define OHCI_QUIRK_AMD756 0xabcd
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#define read_roothub(hc, register, mask) ({ \
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u32 temp = readl (&hc->regs->roothub.register); \
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if (hc->flags & OHCI_QUIRK_AMD756) \
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while (temp & mask) \
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temp = readl (&hc->regs->roothub.register); \
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temp; })
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static u32 roothub_a (struct ohci *hc)
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{ return read_roothub (hc, a, 0xfc0fe000); }
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static inline u32 roothub_b (struct ohci *hc)
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{ return readl (&hc->regs->roothub.b); }
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static inline u32 roothub_status (struct ohci *hc)
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{ return readl (&hc->regs->roothub.status); }
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static u32 roothub_portstatus (struct ohci *hc, int i)
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{ return read_roothub (hc, portstatus [i], 0xffe0fce0); }
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/* forward declaration */
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static int hc_interrupt (void);
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static void
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td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
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int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
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/*-------------------------------------------------------------------------*
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* URB support functions
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*-------------------------------------------------------------------------*/
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/* free HCD-private data associated with this URB */
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static void urb_free_priv (urb_priv_t * urb)
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{
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int i;
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int last;
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struct td * td;
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last = urb->length - 1;
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if (last >= 0) {
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for (i = 0; i <= last; i++) {
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td = urb->td[i];
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if (td) {
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td->usb_dev = NULL;
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urb->td[i] = NULL;
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}
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}
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}
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}
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/*-------------------------------------------------------------------------*/
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#ifdef DEBUG
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static int sohci_get_current_frame_number (struct usb_device * dev);
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/* debug| print the main components of an URB
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* small: 0) header + data packets 1) just header */
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static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
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int transfer_len, struct devrequest * setup, char * str, int small)
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{
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urb_priv_t * purb = &urb_priv;
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dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
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str,
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sohci_get_current_frame_number (dev),
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usb_pipedevice (pipe),
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usb_pipeendpoint (pipe),
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usb_pipeout (pipe)? 'O': 'I',
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usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
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(usb_pipecontrol (pipe)? "CTRL": "BULK"),
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purb->actual_length,
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transfer_len, dev->status);
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#ifdef OHCI_VERBOSE_DEBUG
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if (!small) {
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int i, len;
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if (usb_pipecontrol (pipe)) {
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printf (__FILE__ ": cmd(8):");
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for (i = 0; i < 8 ; i++)
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printf (" %02x", ((__u8 *) setup) [i]);
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printf ("\n");
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}
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if (transfer_len > 0 && buffer) {
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printf (__FILE__ ": data(%d/%d):",
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purb->actual_length,
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transfer_len);
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len = usb_pipeout (pipe)?
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transfer_len: purb->actual_length;
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for (i = 0; i < 16 && i < len; i++)
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printf (" %02x", ((__u8 *) buffer) [i]);
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printf ("%s\n", i < len? "...": "");
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}
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}
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#endif
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}
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/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
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void ep_print_int_eds (ohci_t *ohci, char * str) {
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int i, j;
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__u32 * ed_p;
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for (i= 0; i < 32; i++) {
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j = 5;
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ed_p = &(ohci->hcca->int_table [i]);
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if (*ed_p == 0)
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continue;
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printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
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while (*ed_p != 0 && j--) {
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ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
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printf (" ed: %4x;", ed->hwINFO);
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ed_p = &ed->hwNextED;
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}
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printf ("\n");
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}
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}
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static void ohci_dump_intr_mask (char *label, __u32 mask)
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{
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dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
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label,
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mask,
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(mask & OHCI_INTR_MIE) ? " MIE" : "",
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(mask & OHCI_INTR_OC) ? " OC" : "",
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(mask & OHCI_INTR_RHSC) ? " RHSC" : "",
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(mask & OHCI_INTR_FNO) ? " FNO" : "",
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(mask & OHCI_INTR_UE) ? " UE" : "",
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(mask & OHCI_INTR_RD) ? " RD" : "",
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(mask & OHCI_INTR_SF) ? " SF" : "",
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(mask & OHCI_INTR_WDH) ? " WDH" : "",
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(mask & OHCI_INTR_SO) ? " SO" : ""
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);
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}
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static void maybe_print_eds (char *label, __u32 value)
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{
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ed_t *edp = (ed_t *)value;
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if (value) {
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dbg ("%s %08x", label, value);
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dbg ("%08x", edp->hwINFO);
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dbg ("%08x", edp->hwTailP);
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dbg ("%08x", edp->hwHeadP);
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dbg ("%08x", edp->hwNextED);
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}
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}
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static char * hcfs2string (int state)
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{
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switch (state) {
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case OHCI_USB_RESET: return "reset";
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case OHCI_USB_RESUME: return "resume";
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case OHCI_USB_OPER: return "operational";
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case OHCI_USB_SUSPEND: return "suspend";
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}
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return "?";
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}
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/* dump control and status registers */
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static void ohci_dump_status (ohci_t *controller)
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{
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struct ohci_regs *regs = controller->regs;
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__u32 temp;
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temp = readl (®s->revision) & 0xff;
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if (temp != 0x10)
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dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
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temp = readl (®s->control);
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dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
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(temp & OHCI_CTRL_RWE) ? " RWE" : "",
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(temp & OHCI_CTRL_RWC) ? " RWC" : "",
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(temp & OHCI_CTRL_IR) ? " IR" : "",
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hcfs2string (temp & OHCI_CTRL_HCFS),
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(temp & OHCI_CTRL_BLE) ? " BLE" : "",
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(temp & OHCI_CTRL_CLE) ? " CLE" : "",
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(temp & OHCI_CTRL_IE) ? " IE" : "",
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(temp & OHCI_CTRL_PLE) ? " PLE" : "",
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temp & OHCI_CTRL_CBSR
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);
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temp = readl (®s->cmdstatus);
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dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
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(temp & OHCI_SOC) >> 16,
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(temp & OHCI_OCR) ? " OCR" : "",
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(temp & OHCI_BLF) ? " BLF" : "",
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(temp & OHCI_CLF) ? " CLF" : "",
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(temp & OHCI_HCR) ? " HCR" : ""
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);
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ohci_dump_intr_mask ("intrstatus", readl (®s->intrstatus));
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ohci_dump_intr_mask ("intrenable", readl (®s->intrenable));
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maybe_print_eds ("ed_periodcurrent", readl (®s->ed_periodcurrent));
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maybe_print_eds ("ed_controlhead", readl (®s->ed_controlhead));
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maybe_print_eds ("ed_controlcurrent", readl (®s->ed_controlcurrent));
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maybe_print_eds ("ed_bulkhead", readl (®s->ed_bulkhead));
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maybe_print_eds ("ed_bulkcurrent", readl (®s->ed_bulkcurrent));
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maybe_print_eds ("donehead", readl (®s->donehead));
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}
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static void ohci_dump_roothub (ohci_t *controller, int verbose)
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{
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__u32 temp, ndp, i;
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temp = roothub_a (controller);
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ndp = (temp & RH_A_NDP);
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if (verbose) {
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dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
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((temp & RH_A_POTPGT) >> 24) & 0xff,
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(temp & RH_A_NOCP) ? " NOCP" : "",
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(temp & RH_A_OCPM) ? " OCPM" : "",
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(temp & RH_A_DT) ? " DT" : "",
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(temp & RH_A_NPS) ? " NPS" : "",
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(temp & RH_A_PSM) ? " PSM" : "",
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ndp
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);
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temp = roothub_b (controller);
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dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
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temp,
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(temp & RH_B_PPCM) >> 16,
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(temp & RH_B_DR)
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);
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temp = roothub_status (controller);
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dbg ("roothub.status: %08x%s%s%s%s%s%s",
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temp,
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(temp & RH_HS_CRWE) ? " CRWE" : "",
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(temp & RH_HS_OCIC) ? " OCIC" : "",
|
|
(temp & RH_HS_LPSC) ? " LPSC" : "",
|
|
(temp & RH_HS_DRWE) ? " DRWE" : "",
|
|
(temp & RH_HS_OCI) ? " OCI" : "",
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(temp & RH_HS_LPS) ? " LPS" : ""
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);
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}
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|
|
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for (i = 0; i < ndp; i++) {
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temp = roothub_portstatus (controller, i);
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dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
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i,
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temp,
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(temp & RH_PS_PRSC) ? " PRSC" : "",
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(temp & RH_PS_OCIC) ? " OCIC" : "",
|
|
(temp & RH_PS_PSSC) ? " PSSC" : "",
|
|
(temp & RH_PS_PESC) ? " PESC" : "",
|
|
(temp & RH_PS_CSC) ? " CSC" : "",
|
|
|
|
(temp & RH_PS_LSDA) ? " LSDA" : "",
|
|
(temp & RH_PS_PPS) ? " PPS" : "",
|
|
(temp & RH_PS_PRS) ? " PRS" : "",
|
|
(temp & RH_PS_POCI) ? " POCI" : "",
|
|
(temp & RH_PS_PSS) ? " PSS" : "",
|
|
|
|
(temp & RH_PS_PES) ? " PES" : "",
|
|
(temp & RH_PS_CCS) ? " CCS" : ""
|
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);
|
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}
|
|
}
|
|
|
|
static void ohci_dump (ohci_t *controller, int verbose)
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{
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dbg ("OHCI controller usb-%s state", controller->slot_name);
|
|
|
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/* dumps some of the state we know about */
|
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ohci_dump_status (controller);
|
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if (verbose)
|
|
ep_print_int_eds (controller, "hcca");
|
|
dbg ("hcca frame #%04x", controller->hcca->frame_no);
|
|
ohci_dump_roothub (controller, 1);
|
|
}
|
|
|
|
|
|
#endif /* DEBUG */
|
|
|
|
/*-------------------------------------------------------------------------*
|
|
* Interface functions (URB)
|
|
*-------------------------------------------------------------------------*/
|
|
|
|
/* get a transfer request */
|
|
|
|
int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
|
|
int transfer_len, struct devrequest *setup, int interval)
|
|
{
|
|
ohci_t *ohci;
|
|
ed_t * ed;
|
|
urb_priv_t *purb_priv;
|
|
int i, size = 0;
|
|
|
|
ohci = &gohci;
|
|
|
|
/* when controller's hung, permit only roothub cleanup attempts
|
|
* such as powering down ports */
|
|
if (ohci->disabled) {
|
|
err("sohci_submit_job: EPIPE");
|
|
return -1;
|
|
}
|
|
|
|
/* if we have an unfinished URB from previous transaction let's
|
|
* fail and scream as quickly as possible so as not to corrupt
|
|
* further communication */
|
|
if (!urb_finished) {
|
|
err("sohci_submit_job: URB NOT FINISHED");
|
|
return -1;
|
|
}
|
|
/* we're about to begin a new transaction here so mark the URB unfinished */
|
|
urb_finished = 0;
|
|
|
|
/* every endpoint has a ed, locate and fill it */
|
|
if (!(ed = ep_add_ed (dev, pipe))) {
|
|
err("sohci_submit_job: ENOMEM");
|
|
return -1;
|
|
}
|
|
|
|
/* for the private part of the URB we need the number of TDs (size) */
|
|
switch (usb_pipetype (pipe)) {
|
|
case PIPE_BULK: /* one TD for every 4096 Byte */
|
|
size = (transfer_len - 1) / 4096 + 1;
|
|
break;
|
|
case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
|
|
size = (transfer_len == 0)? 2:
|
|
(transfer_len - 1) / 4096 + 3;
|
|
break;
|
|
}
|
|
|
|
if (size >= (N_URB_TD - 1)) {
|
|
err("need %d TDs, only have %d", size, N_URB_TD);
|
|
return -1;
|
|
}
|
|
purb_priv = &urb_priv;
|
|
purb_priv->pipe = pipe;
|
|
|
|
/* fill the private part of the URB */
|
|
purb_priv->length = size;
|
|
purb_priv->ed = ed;
|
|
purb_priv->actual_length = 0;
|
|
|
|
/* allocate the TDs */
|
|
/* note that td[0] was allocated in ep_add_ed */
|
|
for (i = 0; i < size; i++) {
|
|
purb_priv->td[i] = td_alloc (dev);
|
|
if (!purb_priv->td[i]) {
|
|
purb_priv->length = i;
|
|
urb_free_priv (purb_priv);
|
|
err("sohci_submit_job: ENOMEM");
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
|
|
urb_free_priv (purb_priv);
|
|
err("sohci_submit_job: EINVAL");
|
|
return -1;
|
|
}
|
|
|
|
/* link the ed into a chain if is not already */
|
|
if (ed->state != ED_OPER)
|
|
ep_link (ohci, ed);
|
|
|
|
/* fill the TDs and link it to the ed */
|
|
td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
#ifdef DEBUG
|
|
/* tell us the current USB frame number */
|
|
|
|
static int sohci_get_current_frame_number (struct usb_device *usb_dev)
|
|
{
|
|
ohci_t *ohci = &gohci;
|
|
|
|
return ohci_cpu_to_le16 (ohci->hcca->frame_no);
|
|
}
|
|
#endif
|
|
|
|
/*-------------------------------------------------------------------------*
|
|
* ED handling functions
|
|
*-------------------------------------------------------------------------*/
|
|
|
|
/* link an ed into one of the HC chains */
|
|
|
|
static int ep_link (ohci_t *ohci, ed_t *edi)
|
|
{
|
|
volatile ed_t *ed = edi;
|
|
|
|
ed->state = ED_OPER;
|
|
|
|
switch (ed->type) {
|
|
case PIPE_CONTROL:
|
|
ed->hwNextED = 0;
|
|
if (ohci->ed_controltail == NULL) {
|
|
writel (ed, &ohci->regs->ed_controlhead);
|
|
} else {
|
|
ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
|
|
}
|
|
ed->ed_prev = ohci->ed_controltail;
|
|
if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
|
|
!ohci->ed_rm_list[1] && !ohci->sleeping) {
|
|
ohci->hc_control |= OHCI_CTRL_CLE;
|
|
writel (ohci->hc_control, &ohci->regs->control);
|
|
}
|
|
ohci->ed_controltail = edi;
|
|
break;
|
|
|
|
case PIPE_BULK:
|
|
ed->hwNextED = 0;
|
|
if (ohci->ed_bulktail == NULL) {
|
|
writel (ed, &ohci->regs->ed_bulkhead);
|
|
} else {
|
|
ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
|
|
}
|
|
ed->ed_prev = ohci->ed_bulktail;
|
|
if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
|
|
!ohci->ed_rm_list[1] && !ohci->sleeping) {
|
|
ohci->hc_control |= OHCI_CTRL_BLE;
|
|
writel (ohci->hc_control, &ohci->regs->control);
|
|
}
|
|
ohci->ed_bulktail = edi;
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* unlink an ed from one of the HC chains.
|
|
* just the link to the ed is unlinked.
|
|
* the link from the ed still points to another operational ed or 0
|
|
* so the HC can eventually finish the processing of the unlinked ed */
|
|
|
|
static int ep_unlink (ohci_t *ohci, ed_t *edi)
|
|
{
|
|
volatile ed_t *ed = edi;
|
|
|
|
ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
|
|
|
|
switch (ed->type) {
|
|
case PIPE_CONTROL:
|
|
if (ed->ed_prev == NULL) {
|
|
if (!ed->hwNextED) {
|
|
ohci->hc_control &= ~OHCI_CTRL_CLE;
|
|
writel (ohci->hc_control, &ohci->regs->control);
|
|
}
|
|
writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
|
|
} else {
|
|
ed->ed_prev->hwNextED = ed->hwNextED;
|
|
}
|
|
if (ohci->ed_controltail == ed) {
|
|
ohci->ed_controltail = ed->ed_prev;
|
|
} else {
|
|
((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
|
|
}
|
|
break;
|
|
|
|
case PIPE_BULK:
|
|
if (ed->ed_prev == NULL) {
|
|
if (!ed->hwNextED) {
|
|
ohci->hc_control &= ~OHCI_CTRL_BLE;
|
|
writel (ohci->hc_control, &ohci->regs->control);
|
|
}
|
|
writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
|
|
} else {
|
|
ed->ed_prev->hwNextED = ed->hwNextED;
|
|
}
|
|
if (ohci->ed_bulktail == ed) {
|
|
ohci->ed_bulktail = ed->ed_prev;
|
|
} else {
|
|
((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
|
|
}
|
|
break;
|
|
}
|
|
ed->state = ED_UNLINK;
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
|
|
* but the USB stack is a little bit stateless so we do it at every transaction
|
|
* if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
|
|
* in all other cases the state is left unchanged
|
|
* the ed info fields are setted anyway even though most of them should not change */
|
|
|
|
static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
|
|
{
|
|
td_t *td;
|
|
ed_t *ed_ret;
|
|
volatile ed_t *ed;
|
|
|
|
ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
|
|
(usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
|
|
|
|
if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
|
|
err("ep_add_ed: pending delete");
|
|
/* pending delete request */
|
|
return NULL;
|
|
}
|
|
|
|
if (ed->state == ED_NEW) {
|
|
ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
|
|
/* dummy td; end of td list for ed */
|
|
td = td_alloc (usb_dev);
|
|
ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
|
|
ed->hwHeadP = ed->hwTailP;
|
|
ed->state = ED_UNLINK;
|
|
ed->type = usb_pipetype (pipe);
|
|
ohci_dev.ed_cnt++;
|
|
}
|
|
|
|
ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
|
|
| usb_pipeendpoint (pipe) << 7
|
|
| (usb_pipeisoc (pipe)? 0x8000: 0)
|
|
| (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
|
|
| usb_pipeslow (pipe) << 13
|
|
| usb_maxpacket (usb_dev, pipe) << 16);
|
|
|
|
return ed_ret;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*
|
|
* TD handling functions
|
|
*-------------------------------------------------------------------------*/
|
|
|
|
/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
|
|
|
|
static void td_fill (ohci_t *ohci, unsigned int info,
|
|
void *data, int len,
|
|
struct usb_device *dev, int index, urb_priv_t *urb_priv)
|
|
{
|
|
volatile td_t *td, *td_pt;
|
|
#ifdef OHCI_FILL_TRACE
|
|
int i;
|
|
#endif
|
|
|
|
if (index > urb_priv->length) {
|
|
err("index > length");
|
|
return;
|
|
}
|
|
/* use this td as the next dummy */
|
|
td_pt = urb_priv->td [index];
|
|
td_pt->hwNextTD = 0;
|
|
|
|
/* fill the old dummy TD */
|
|
td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
|
|
|
|
td->ed = urb_priv->ed;
|
|
td->next_dl_td = NULL;
|
|
td->index = index;
|
|
td->data = (__u32)data;
|
|
#ifdef OHCI_FILL_TRACE
|
|
if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
|
|
for (i = 0; i < len; i++)
|
|
printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
|
|
printf("\n");
|
|
}
|
|
#endif
|
|
if (!len)
|
|
data = 0;
|
|
|
|
td->hwINFO = ohci_cpu_to_le32 (info);
|
|
td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
|
|
if (data)
|
|
td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
|
|
else
|
|
td->hwBE = 0;
|
|
td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
|
|
|
|
/* append to queue */
|
|
td->ed->hwTailP = td->hwNextTD;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* prepare all TDs of a transfer */
|
|
static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
|
|
int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
|
|
{
|
|
ohci_t *ohci = &gohci;
|
|
int data_len = transfer_len;
|
|
void *data;
|
|
int cnt = 0;
|
|
__u32 info = 0;
|
|
unsigned int toggle = 0;
|
|
|
|
/* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
|
|
if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
|
|
toggle = TD_T_TOGGLE;
|
|
} else {
|
|
toggle = TD_T_DATA0;
|
|
usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
|
|
}
|
|
urb->td_cnt = 0;
|
|
if (data_len)
|
|
data = buffer;
|
|
else
|
|
data = 0;
|
|
|
|
switch (usb_pipetype (pipe)) {
|
|
case PIPE_BULK:
|
|
info = usb_pipeout (pipe)?
|
|
TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
|
|
while(data_len > 4096) {
|
|
td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
|
|
data += 4096; data_len -= 4096; cnt++;
|
|
}
|
|
info = usb_pipeout (pipe)?
|
|
TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
|
|
td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
|
|
cnt++;
|
|
|
|
if (!ohci->sleeping)
|
|
writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
|
|
break;
|
|
|
|
case PIPE_CONTROL:
|
|
info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
|
|
td_fill (ohci, info, setup, 8, dev, cnt++, urb);
|
|
if (data_len > 0) {
|
|
info = usb_pipeout (pipe)?
|
|
TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
|
|
/* NOTE: mishandles transfers >8K, some >4K */
|
|
td_fill (ohci, info, data, data_len, dev, cnt++, urb);
|
|
}
|
|
info = usb_pipeout (pipe)?
|
|
TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
|
|
td_fill (ohci, info, data, 0, dev, cnt++, urb);
|
|
if (!ohci->sleeping)
|
|
writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
|
|
break;
|
|
}
|
|
if (urb->length != cnt)
|
|
dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*
|
|
* Done List handling functions
|
|
*-------------------------------------------------------------------------*/
|
|
|
|
|
|
/* calculate the transfer length and update the urb */
|
|
|
|
static void dl_transfer_length(td_t * td)
|
|
{
|
|
__u32 tdINFO, tdBE, tdCBP;
|
|
urb_priv_t *lurb_priv = &urb_priv;
|
|
|
|
tdINFO = ohci_cpu_to_le32 (td->hwINFO);
|
|
tdBE = ohci_cpu_to_le32 (td->hwBE);
|
|
tdCBP = ohci_cpu_to_le32 (td->hwCBP);
|
|
|
|
|
|
if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
|
|
((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
|
|
if (tdBE != 0) {
|
|
if (td->hwCBP == 0)
|
|
lurb_priv->actual_length += tdBE - td->data + 1;
|
|
else
|
|
lurb_priv->actual_length += tdCBP - td->data;
|
|
}
|
|
}
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* replies to the request have to be on a FIFO basis so
|
|
* we reverse the reversed done-list */
|
|
|
|
static td_t * dl_reverse_done_list (ohci_t *ohci)
|
|
{
|
|
__u32 td_list_hc;
|
|
td_t *td_rev = NULL;
|
|
td_t *td_list = NULL;
|
|
urb_priv_t *lurb_priv = NULL;
|
|
|
|
td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
|
|
ohci->hcca->done_head = 0;
|
|
|
|
while (td_list_hc) {
|
|
td_list = (td_t *)td_list_hc;
|
|
|
|
if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
|
|
lurb_priv = &urb_priv;
|
|
dbg(" USB-error/status: %x : %p",
|
|
TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
|
|
if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
|
|
if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
|
|
td_list->ed->hwHeadP =
|
|
(lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
|
|
(td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
|
|
lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
|
|
} else
|
|
td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
|
|
}
|
|
#ifdef CONFIG_MPC5200
|
|
td_list->hwNextTD = 0;
|
|
#endif
|
|
}
|
|
|
|
td_list->next_dl_td = td_rev;
|
|
td_rev = td_list;
|
|
td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
|
|
}
|
|
return td_list;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* td done list */
|
|
static int dl_done_list (ohci_t *ohci, td_t *td_list)
|
|
{
|
|
td_t *td_list_next = NULL;
|
|
ed_t *ed;
|
|
int cc = 0;
|
|
int stat = 0;
|
|
/* urb_t *urb; */
|
|
urb_priv_t *lurb_priv;
|
|
__u32 tdINFO, edHeadP, edTailP;
|
|
|
|
while (td_list) {
|
|
td_list_next = td_list->next_dl_td;
|
|
|
|
lurb_priv = &urb_priv;
|
|
tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
|
|
|
|
ed = td_list->ed;
|
|
|
|
dl_transfer_length(td_list);
|
|
|
|
/* error code of transfer */
|
|
cc = TD_CC_GET (tdINFO);
|
|
if (++(lurb_priv->td_cnt) == lurb_priv->length) {
|
|
if ((ed->state & (ED_OPER | ED_UNLINK))
|
|
&& (lurb_priv->state != URB_DEL)) {
|
|
dbg("ConditionCode %#x", cc);
|
|
stat = cc_to_error[cc];
|
|
urb_finished = 1;
|
|
}
|
|
}
|
|
|
|
if (ed->state != ED_NEW) {
|
|
edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
|
|
edTailP = ohci_cpu_to_le32 (ed->hwTailP);
|
|
|
|
/* unlink eds if they are not busy */
|
|
if ((edHeadP == edTailP) && (ed->state == ED_OPER))
|
|
ep_unlink (ohci, ed);
|
|
}
|
|
|
|
td_list = td_list_next;
|
|
}
|
|
return stat;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*
|
|
* Virtual Root Hub
|
|
*-------------------------------------------------------------------------*/
|
|
|
|
/* Device descriptor */
|
|
static __u8 root_hub_dev_des[] =
|
|
{
|
|
0x12, /* __u8 bLength; */
|
|
0x01, /* __u8 bDescriptorType; Device */
|
|
0x10, /* __u16 bcdUSB; v1.1 */
|
|
0x01,
|
|
0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
|
|
0x00, /* __u8 bDeviceSubClass; */
|
|
0x00, /* __u8 bDeviceProtocol; */
|
|
0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
|
|
0x00, /* __u16 idVendor; */
|
|
0x00,
|
|
0x00, /* __u16 idProduct; */
|
|
0x00,
|
|
0x00, /* __u16 bcdDevice; */
|
|
0x00,
|
|
0x00, /* __u8 iManufacturer; */
|
|
0x01, /* __u8 iProduct; */
|
|
0x00, /* __u8 iSerialNumber; */
|
|
0x01 /* __u8 bNumConfigurations; */
|
|
};
|
|
|
|
|
|
/* Configuration descriptor */
|
|
static __u8 root_hub_config_des[] =
|
|
{
|
|
0x09, /* __u8 bLength; */
|
|
0x02, /* __u8 bDescriptorType; Configuration */
|
|
0x19, /* __u16 wTotalLength; */
|
|
0x00,
|
|
0x01, /* __u8 bNumInterfaces; */
|
|
0x01, /* __u8 bConfigurationValue; */
|
|
0x00, /* __u8 iConfiguration; */
|
|
0x40, /* __u8 bmAttributes;
|
|
Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
|
|
0x00, /* __u8 MaxPower; */
|
|
|
|
/* interface */
|
|
0x09, /* __u8 if_bLength; */
|
|
0x04, /* __u8 if_bDescriptorType; Interface */
|
|
0x00, /* __u8 if_bInterfaceNumber; */
|
|
0x00, /* __u8 if_bAlternateSetting; */
|
|
0x01, /* __u8 if_bNumEndpoints; */
|
|
0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
|
|
0x00, /* __u8 if_bInterfaceSubClass; */
|
|
0x00, /* __u8 if_bInterfaceProtocol; */
|
|
0x00, /* __u8 if_iInterface; */
|
|
|
|
/* endpoint */
|
|
0x07, /* __u8 ep_bLength; */
|
|
0x05, /* __u8 ep_bDescriptorType; Endpoint */
|
|
0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
|
|
0x03, /* __u8 ep_bmAttributes; Interrupt */
|
|
0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
|
|
0x00,
|
|
0xff /* __u8 ep_bInterval; 255 ms */
|
|
};
|
|
|
|
static unsigned char root_hub_str_index0[] =
|
|
{
|
|
0x04, /* __u8 bLength; */
|
|
0x03, /* __u8 bDescriptorType; String-descriptor */
|
|
0x09, /* __u8 lang ID */
|
|
0x04, /* __u8 lang ID */
|
|
};
|
|
|
|
static unsigned char root_hub_str_index1[] =
|
|
{
|
|
28, /* __u8 bLength; */
|
|
0x03, /* __u8 bDescriptorType; String-descriptor */
|
|
'O', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
'H', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
'C', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
'I', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
' ', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
'R', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
'o', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
'o', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
't', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
' ', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
'H', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
'u', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
'b', /* __u8 Unicode */
|
|
0, /* __u8 Unicode */
|
|
};
|
|
|
|
/* Hub class-specific descriptor is constructed dynamically */
|
|
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
#define OK(x) len = (x); break
|
|
#ifdef DEBUG
|
|
#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
|
|
#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
|
|
#else
|
|
#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
|
|
#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
|
|
#endif
|
|
#define RD_RH_STAT roothub_status(&gohci)
|
|
#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
|
|
|
|
/* request to virtual root hub */
|
|
|
|
int rh_check_port_status(ohci_t *controller)
|
|
{
|
|
__u32 temp, ndp, i;
|
|
int res;
|
|
|
|
res = -1;
|
|
temp = roothub_a (controller);
|
|
ndp = (temp & RH_A_NDP);
|
|
for (i = 0; i < ndp; i++) {
|
|
temp = roothub_portstatus (controller, i);
|
|
/* check for a device disconnect */
|
|
if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
|
|
(RH_PS_PESC | RH_PS_CSC)) &&
|
|
((temp & RH_PS_CCS) == 0)) {
|
|
res = i;
|
|
break;
|
|
}
|
|
}
|
|
return res;
|
|
}
|
|
|
|
static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
|
|
void *buffer, int transfer_len, struct devrequest *cmd)
|
|
{
|
|
void * data = buffer;
|
|
int leni = transfer_len;
|
|
int len = 0;
|
|
int stat = 0;
|
|
__u32 datab[4];
|
|
__u8 *data_buf = (__u8 *)datab;
|
|
__u16 bmRType_bReq;
|
|
__u16 wValue;
|
|
__u16 wIndex;
|
|
__u16 wLength;
|
|
|
|
#ifdef DEBUG
|
|
urb_priv.actual_length = 0;
|
|
pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
|
|
#endif
|
|
if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
|
|
info("Root-Hub submit IRQ: NOT implemented");
|
|
return 0;
|
|
}
|
|
|
|
bmRType_bReq = cmd->requesttype | (cmd->request << 8);
|
|
wValue = m16_swap (cmd->value);
|
|
wIndex = m16_swap (cmd->index);
|
|
wLength = m16_swap (cmd->length);
|
|
|
|
info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
|
|
dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
|
|
|
|
switch (bmRType_bReq) {
|
|
/* Request Destination:
|
|
without flags: Device,
|
|
RH_INTERFACE: interface,
|
|
RH_ENDPOINT: endpoint,
|
|
RH_CLASS means HUB here,
|
|
RH_OTHER | RH_CLASS almost ever means HUB_PORT here
|
|
*/
|
|
|
|
case RH_GET_STATUS:
|
|
*(__u16 *) data_buf = m16_swap (1); OK (2);
|
|
case RH_GET_STATUS | RH_INTERFACE:
|
|
*(__u16 *) data_buf = m16_swap (0); OK (2);
|
|
case RH_GET_STATUS | RH_ENDPOINT:
|
|
*(__u16 *) data_buf = m16_swap (0); OK (2);
|
|
case RH_GET_STATUS | RH_CLASS:
|
|
*(__u32 *) data_buf = m32_swap (
|
|
RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
|
|
OK (4);
|
|
case RH_GET_STATUS | RH_OTHER | RH_CLASS:
|
|
*(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
|
|
|
|
case RH_CLEAR_FEATURE | RH_ENDPOINT:
|
|
switch (wValue) {
|
|
case (RH_ENDPOINT_STALL): OK (0);
|
|
}
|
|
break;
|
|
|
|
case RH_CLEAR_FEATURE | RH_CLASS:
|
|
switch (wValue) {
|
|
case RH_C_HUB_LOCAL_POWER:
|
|
OK(0);
|
|
case (RH_C_HUB_OVER_CURRENT):
|
|
WR_RH_STAT(RH_HS_OCIC); OK (0);
|
|
}
|
|
break;
|
|
|
|
case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
|
|
switch (wValue) {
|
|
case (RH_PORT_ENABLE):
|
|
WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
|
|
case (RH_PORT_SUSPEND):
|
|
WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
|
|
case (RH_PORT_POWER):
|
|
WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
|
|
case (RH_C_PORT_CONNECTION):
|
|
WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
|
|
case (RH_C_PORT_ENABLE):
|
|
WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
|
|
case (RH_C_PORT_SUSPEND):
|
|
WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
|
|
case (RH_C_PORT_OVER_CURRENT):
|
|
WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
|
|
case (RH_C_PORT_RESET):
|
|
WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
|
|
}
|
|
break;
|
|
|
|
case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
|
|
switch (wValue) {
|
|
case (RH_PORT_SUSPEND):
|
|
WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
|
|
case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
|
|
if (RD_RH_PORTSTAT & RH_PS_CCS)
|
|
WR_RH_PORTSTAT (RH_PS_PRS);
|
|
OK (0);
|
|
case (RH_PORT_POWER):
|
|
WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
|
|
case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
|
|
if (RD_RH_PORTSTAT & RH_PS_CCS)
|
|
WR_RH_PORTSTAT (RH_PS_PES );
|
|
OK (0);
|
|
}
|
|
break;
|
|
|
|
case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
|
|
|
|
case RH_GET_DESCRIPTOR:
|
|
switch ((wValue & 0xff00) >> 8) {
|
|
case (0x01): /* device descriptor */
|
|
len = min_t(unsigned int,
|
|
leni,
|
|
min_t(unsigned int,
|
|
sizeof (root_hub_dev_des),
|
|
wLength));
|
|
data_buf = root_hub_dev_des; OK(len);
|
|
case (0x02): /* configuration descriptor */
|
|
len = min_t(unsigned int,
|
|
leni,
|
|
min_t(unsigned int,
|
|
sizeof (root_hub_config_des),
|
|
wLength));
|
|
data_buf = root_hub_config_des; OK(len);
|
|
case (0x03): /* string descriptors */
|
|
if(wValue==0x0300) {
|
|
len = min_t(unsigned int,
|
|
leni,
|
|
min_t(unsigned int,
|
|
sizeof (root_hub_str_index0),
|
|
wLength));
|
|
data_buf = root_hub_str_index0;
|
|
OK(len);
|
|
}
|
|
if(wValue==0x0301) {
|
|
len = min_t(unsigned int,
|
|
leni,
|
|
min_t(unsigned int,
|
|
sizeof (root_hub_str_index1),
|
|
wLength));
|
|
data_buf = root_hub_str_index1;
|
|
OK(len);
|
|
}
|
|
default:
|
|
stat = USB_ST_STALLED;
|
|
}
|
|
break;
|
|
|
|
case RH_GET_DESCRIPTOR | RH_CLASS:
|
|
{
|
|
__u32 temp = roothub_a (&gohci);
|
|
|
|
data_buf [0] = 9; /* min length; */
|
|
data_buf [1] = 0x29;
|
|
data_buf [2] = temp & RH_A_NDP;
|
|
data_buf [3] = 0;
|
|
if (temp & RH_A_PSM) /* per-port power switching? */
|
|
data_buf [3] |= 0x1;
|
|
if (temp & RH_A_NOCP) /* no overcurrent reporting? */
|
|
data_buf [3] |= 0x10;
|
|
else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
|
|
data_buf [3] |= 0x8;
|
|
|
|
/* corresponds to data_buf[4-7] */
|
|
datab [1] = 0;
|
|
data_buf [5] = (temp & RH_A_POTPGT) >> 24;
|
|
temp = roothub_b (&gohci);
|
|
data_buf [7] = temp & RH_B_DR;
|
|
if (data_buf [2] < 7) {
|
|
data_buf [8] = 0xff;
|
|
} else {
|
|
data_buf [0] += 2;
|
|
data_buf [8] = (temp & RH_B_DR) >> 8;
|
|
data_buf [10] = data_buf [9] = 0xff;
|
|
}
|
|
|
|
len = min_t(unsigned int, leni,
|
|
min_t(unsigned int, data_buf [0], wLength));
|
|
OK (len);
|
|
}
|
|
|
|
case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
|
|
|
|
case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
|
|
|
|
default:
|
|
dbg ("unsupported root hub command");
|
|
stat = USB_ST_STALLED;
|
|
}
|
|
|
|
#ifdef DEBUG
|
|
ohci_dump_roothub (&gohci, 1);
|
|
#endif
|
|
|
|
len = min_t(int, len, leni);
|
|
if (data != data_buf)
|
|
memcpy (data, data_buf, len);
|
|
dev->act_len = len;
|
|
dev->status = stat;
|
|
|
|
#ifdef DEBUG
|
|
if (transfer_len)
|
|
urb_priv.actual_length = transfer_len;
|
|
pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
|
|
#endif
|
|
|
|
return stat;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* common code for handling submit messages - used for all but root hub */
|
|
/* accesses. */
|
|
int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
|
|
int transfer_len, struct devrequest *setup, int interval)
|
|
{
|
|
int stat = 0;
|
|
int maxsize = usb_maxpacket(dev, pipe);
|
|
int timeout;
|
|
|
|
/* device pulled? Shortcut the action. */
|
|
if (devgone == dev) {
|
|
dev->status = USB_ST_CRC_ERR;
|
|
return 0;
|
|
}
|
|
|
|
#ifdef DEBUG
|
|
urb_priv.actual_length = 0;
|
|
pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
|
|
#endif
|
|
if (!maxsize) {
|
|
err("submit_common_message: pipesize for pipe %lx is zero",
|
|
pipe);
|
|
return -1;
|
|
}
|
|
|
|
if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
|
|
err("sohci_submit_job failed");
|
|
return -1;
|
|
}
|
|
|
|
/* allow more time for a BULK device to react - some are slow */
|
|
#define BULK_TO 5000 /* timeout in milliseconds */
|
|
if (usb_pipetype (pipe) == PIPE_BULK)
|
|
timeout = BULK_TO;
|
|
else
|
|
timeout = 100;
|
|
|
|
/* wait for it to complete */
|
|
for (;;) {
|
|
/* check whether the controller is done */
|
|
stat = hc_interrupt();
|
|
if (stat < 0) {
|
|
stat = USB_ST_CRC_ERR;
|
|
break;
|
|
}
|
|
|
|
/* NOTE: since we are not interrupt driven in U-Boot and always
|
|
* handle only one URB at a time, we cannot assume the
|
|
* transaction finished on the first successful return from
|
|
* hc_interrupt().. unless the flag for current URB is set,
|
|
* meaning that all TD's to/from device got actually
|
|
* transferred and processed. If the current URB is not
|
|
* finished we need to re-iterate this loop so as
|
|
* hc_interrupt() gets called again as there needs to be some
|
|
* more TD's to process still */
|
|
if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
|
|
/* 0xff is returned for an SF-interrupt */
|
|
break;
|
|
}
|
|
|
|
if (--timeout) {
|
|
wait_ms(1);
|
|
if (!urb_finished)
|
|
dbg("\%");
|
|
|
|
} else {
|
|
err("CTL:TIMEOUT ");
|
|
dbg("submit_common_msg: TO status %x\n", stat);
|
|
stat = USB_ST_CRC_ERR;
|
|
urb_finished = 1;
|
|
break;
|
|
}
|
|
}
|
|
#if 0
|
|
/* we got an Root Hub Status Change interrupt */
|
|
if (got_rhsc) {
|
|
#ifdef DEBUG
|
|
ohci_dump_roothub (&gohci, 1);
|
|
#endif
|
|
got_rhsc = 0;
|
|
/* abuse timeout */
|
|
timeout = rh_check_port_status(&gohci);
|
|
if (timeout >= 0) {
|
|
#if 0 /* this does nothing useful, but leave it here in case that changes */
|
|
/* the called routine adds 1 to the passed value */
|
|
usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
|
|
#endif
|
|
/*
|
|
* XXX
|
|
* This is potentially dangerous because it assumes
|
|
* that only one device is ever plugged in!
|
|
*/
|
|
devgone = dev;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
dev->status = stat;
|
|
dev->act_len = transfer_len;
|
|
|
|
#ifdef DEBUG
|
|
pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
|
|
#endif
|
|
|
|
/* free TDs in urb_priv */
|
|
urb_free_priv (&urb_priv);
|
|
return 0;
|
|
}
|
|
|
|
/* submit routines called from usb.c */
|
|
int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
|
|
int transfer_len)
|
|
{
|
|
info("submit_bulk_msg");
|
|
return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
|
|
}
|
|
|
|
int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
|
|
int transfer_len, struct devrequest *setup)
|
|
{
|
|
int maxsize = usb_maxpacket(dev, pipe);
|
|
|
|
info("submit_control_msg");
|
|
#ifdef DEBUG
|
|
urb_priv.actual_length = 0;
|
|
pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
|
|
#endif
|
|
if (!maxsize) {
|
|
err("submit_control_message: pipesize for pipe %lx is zero",
|
|
pipe);
|
|
return -1;
|
|
}
|
|
if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
|
|
gohci.rh.dev = dev;
|
|
/* root hub - redirect */
|
|
return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
|
|
setup);
|
|
}
|
|
|
|
return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
|
|
}
|
|
|
|
int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
|
|
int transfer_len, int interval)
|
|
{
|
|
info("submit_int_msg");
|
|
return -1;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*
|
|
* HC functions
|
|
*-------------------------------------------------------------------------*/
|
|
|
|
/* reset the HC and BUS */
|
|
|
|
static int hc_reset (ohci_t *ohci)
|
|
{
|
|
int timeout = 30;
|
|
int smm_timeout = 50; /* 0,5 sec */
|
|
|
|
if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
|
|
writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
|
|
info("USB HC TakeOver from SMM");
|
|
while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
|
|
wait_ms (10);
|
|
if (--smm_timeout == 0) {
|
|
err("USB HC TakeOver failed!");
|
|
return -1;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Disable HC interrupts */
|
|
writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
|
|
|
|
dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
|
|
ohci->slot_name,
|
|
readl (&ohci->regs->control));
|
|
|
|
/* Reset USB (needed by some controllers) */
|
|
ohci->hc_control = 0;
|
|
writel (ohci->hc_control, &ohci->regs->control);
|
|
|
|
/* HC Reset requires max 10 us delay */
|
|
writel (OHCI_HCR, &ohci->regs->cmdstatus);
|
|
while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
|
|
if (--timeout == 0) {
|
|
err("USB HC reset timed out!");
|
|
return -1;
|
|
}
|
|
udelay (1);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* Start an OHCI controller, set the BUS operational
|
|
* enable interrupts
|
|
* connect the virtual root hub */
|
|
|
|
static int hc_start (ohci_t * ohci)
|
|
{
|
|
__u32 mask;
|
|
unsigned int fminterval;
|
|
|
|
ohci->disabled = 1;
|
|
|
|
/* Tell the controller where the control and bulk lists are
|
|
* The lists are empty now. */
|
|
|
|
writel (0, &ohci->regs->ed_controlhead);
|
|
writel (0, &ohci->regs->ed_bulkhead);
|
|
|
|
writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
|
|
|
|
fminterval = 0x2edf;
|
|
writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
|
|
fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
|
|
writel (fminterval, &ohci->regs->fminterval);
|
|
writel (0x628, &ohci->regs->lsthresh);
|
|
|
|
/* start controller operations */
|
|
ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
|
|
ohci->disabled = 0;
|
|
writel (ohci->hc_control, &ohci->regs->control);
|
|
|
|
/* disable all interrupts */
|
|
mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
|
|
OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
|
|
OHCI_INTR_OC | OHCI_INTR_MIE);
|
|
writel (mask, &ohci->regs->intrdisable);
|
|
/* clear all interrupts */
|
|
mask &= ~OHCI_INTR_MIE;
|
|
writel (mask, &ohci->regs->intrstatus);
|
|
/* Choose the interrupts we care about now - but w/o MIE */
|
|
mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
|
|
writel (mask, &ohci->regs->intrenable);
|
|
|
|
#ifdef OHCI_USE_NPS
|
|
/* required for AMD-756 and some Mac platforms */
|
|
writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
|
|
&ohci->regs->roothub.a);
|
|
writel (RH_HS_LPSC, &ohci->regs->roothub.status);
|
|
#endif /* OHCI_USE_NPS */
|
|
|
|
#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
|
|
/* POTPGT delay is bits 24-31, in 2 ms units. */
|
|
mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
|
|
|
|
/* connect the virtual root hub */
|
|
ohci->rh.devnum = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* an interrupt happens */
|
|
|
|
static int
|
|
hc_interrupt (void)
|
|
{
|
|
ohci_t *ohci = &gohci;
|
|
struct ohci_regs *regs = ohci->regs;
|
|
int ints;
|
|
int stat = -1;
|
|
|
|
if ((ohci->hcca->done_head != 0) &&
|
|
!(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
|
|
|
|
ints = OHCI_INTR_WDH;
|
|
|
|
} else if ((ints = readl (®s->intrstatus)) == ~(u32)0) {
|
|
ohci->disabled++;
|
|
err ("%s device removed!", ohci->slot_name);
|
|
return -1;
|
|
|
|
} else if ((ints &= readl (®s->intrenable)) == 0) {
|
|
dbg("hc_interrupt: returning..\n");
|
|
return 0xff;
|
|
}
|
|
|
|
/* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
|
|
|
|
if (ints & OHCI_INTR_RHSC) {
|
|
got_rhsc = 1;
|
|
stat = 0xff;
|
|
}
|
|
|
|
if (ints & OHCI_INTR_UE) {
|
|
ohci->disabled++;
|
|
err ("OHCI Unrecoverable Error, controller usb-%s disabled",
|
|
ohci->slot_name);
|
|
/* e.g. due to PCI Master/Target Abort */
|
|
|
|
#ifdef DEBUG
|
|
ohci_dump (ohci, 1);
|
|
#endif
|
|
/* FIXME: be optimistic, hope that bug won't repeat often. */
|
|
/* Make some non-interrupt context restart the controller. */
|
|
/* Count and limit the retries though; either hardware or */
|
|
/* software errors can go forever... */
|
|
hc_reset (ohci);
|
|
return -1;
|
|
}
|
|
|
|
if (ints & OHCI_INTR_WDH) {
|
|
writel (OHCI_INTR_WDH, ®s->intrdisable);
|
|
stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
|
|
writel (OHCI_INTR_WDH, ®s->intrenable);
|
|
}
|
|
|
|
if (ints & OHCI_INTR_SO) {
|
|
dbg("USB Schedule overrun\n");
|
|
writel (OHCI_INTR_SO, ®s->intrenable);
|
|
stat = -1;
|
|
}
|
|
|
|
/* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
|
|
if (ints & OHCI_INTR_SF) {
|
|
unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
|
|
wait_ms(1);
|
|
writel (OHCI_INTR_SF, ®s->intrdisable);
|
|
if (ohci->ed_rm_list[frame] != NULL)
|
|
writel (OHCI_INTR_SF, ®s->intrenable);
|
|
stat = 0xff;
|
|
}
|
|
|
|
writel (ints, ®s->intrstatus);
|
|
return stat;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* De-allocate all resources.. */
|
|
|
|
static void hc_release_ohci (ohci_t *ohci)
|
|
{
|
|
dbg ("USB HC release ohci usb-%s", ohci->slot_name);
|
|
|
|
if (!ohci->disabled)
|
|
hc_reset (ohci);
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/*
|
|
* low level initalisation routine, called from usb.c
|
|
*/
|
|
static char ohci_inited = 0;
|
|
|
|
int usb_lowlevel_init(void)
|
|
{
|
|
|
|
/* Set the USB Clock */
|
|
*(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK;
|
|
|
|
/* remove all USB bits first before ORing in ours */
|
|
*(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00807000;
|
|
|
|
/* Activate USB port */
|
|
*(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= CONFIG_USB_CONFIG;
|
|
|
|
memset (&gohci, 0, sizeof (ohci_t));
|
|
memset (&urb_priv, 0, sizeof (urb_priv_t));
|
|
|
|
/* align the storage */
|
|
if ((__u32)&ghcca[0] & 0xff) {
|
|
err("HCCA not aligned!!");
|
|
return -1;
|
|
}
|
|
phcca = &ghcca[0];
|
|
info("aligned ghcca %p", phcca);
|
|
memset(&ohci_dev, 0, sizeof(struct ohci_device));
|
|
if ((__u32)&ohci_dev.ed[0] & 0x7) {
|
|
err("EDs not aligned!!");
|
|
return -1;
|
|
}
|
|
memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
|
|
if ((__u32)gtd & 0x7) {
|
|
err("TDs not aligned!!");
|
|
return -1;
|
|
}
|
|
ptd = gtd;
|
|
gohci.hcca = phcca;
|
|
memset (phcca, 0, sizeof (struct ohci_hcca));
|
|
|
|
gohci.disabled = 1;
|
|
gohci.sleeping = 0;
|
|
gohci.irq = -1;
|
|
gohci.regs = (struct ohci_regs *)MPC5XXX_USB;
|
|
|
|
gohci.flags = 0;
|
|
gohci.slot_name = "mpc5200";
|
|
|
|
if (hc_reset (&gohci) < 0) {
|
|
hc_release_ohci (&gohci);
|
|
return -1;
|
|
}
|
|
|
|
if (hc_start (&gohci) < 0) {
|
|
err ("can't start usb-%s", gohci.slot_name);
|
|
hc_release_ohci (&gohci);
|
|
return -1;
|
|
}
|
|
|
|
#ifdef DEBUG
|
|
ohci_dump (&gohci, 1);
|
|
#endif
|
|
ohci_inited = 1;
|
|
urb_finished = 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int usb_lowlevel_stop(void)
|
|
{
|
|
/* this gets called really early - before the controller has */
|
|
/* even been initialized! */
|
|
if (!ohci_inited)
|
|
return 0;
|
|
/* TODO release any interrupts, etc. */
|
|
/* call hc_release_ohci() here ? */
|
|
hc_reset (&gohci);
|
|
return 0;
|
|
}
|
|
|
|
#endif /* CONFIG_USB_OHCI */
|
|
|