upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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269 lines
6.6 KiB
269 lines
6.6 KiB
/*
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* Copyright (C) 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <errno.h>
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#include <dm.h>
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#include <i2c.h>
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#include <power/pmic.h>
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#include <power/regulator.h>
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#include <power/s5m8767.h>
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DECLARE_GLOBAL_DATA_PTR;
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static const struct sec_voltage_desc buck_v1 = {
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.max = 2225000,
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.min = 650000,
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.step = 6250,
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};
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static const struct sec_voltage_desc buck_v2 = {
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.max = 1600000,
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.min = 600000,
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.step = 6250,
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};
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static const struct sec_voltage_desc buck_v3 = {
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.max = 3000000,
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.min = 750000,
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.step = 12500,
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};
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static const struct sec_voltage_desc ldo_v1 = {
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.max = 3950000,
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.min = 800000,
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.step = 50000,
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};
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static const struct sec_voltage_desc ldo_v2 = {
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.max = 2375000,
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.min = 800000,
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.step = 25000,
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};
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static const struct s5m8767_para buck_param[] = {
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/*
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* | voltage ----| | enable -| voltage
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* regnum addr bpos mask addr on desc
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*/
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{S5M8767_BUCK1, 0x33, 0x0, 0xff, 0x32, 0x3, &buck_v1},
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{S5M8767_BUCK2, 0x35, 0x0, 0xff, 0x34, 0x1, &buck_v2},
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{S5M8767_BUCK3, 0x3e, 0x0, 0xff, 0x3d, 0x1, &buck_v2},
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{S5M8767_BUCK4, 0x47, 0x0, 0xff, 0x46, 0x1, &buck_v2},
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{S5M8767_BUCK5, 0x50, 0x0, 0xff, 0x4f, 0x3, &buck_v1},
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{S5M8767_BUCK6, 0x55, 0x0, 0xff, 0x54, 0x3, &buck_v1},
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{S5M8767_BUCK7, 0x57, 0x0, 0xff, 0x56, 0x3, &buck_v3},
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{S5M8767_BUCK8, 0x59, 0x0, 0xff, 0x58, 0x3, &buck_v3},
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{S5M8767_BUCK9, 0x5b, 0x0, 0xff, 0x5a, 0x3, &buck_v3},
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};
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static const struct s5m8767_para ldo_param[] = {
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{S5M8767_LDO1, 0x5c, 0x0, 0x3f, 0x5c, 0x3, &ldo_v2},
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{S5M8767_LDO2, 0x5d, 0x0, 0x3f, 0x5d, 0x1, &ldo_v2},
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{S5M8767_LDO3, 0x61, 0x0, 0x3f, 0x61, 0x3, &ldo_v1},
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{S5M8767_LDO4, 0x62, 0x0, 0x3f, 0x62, 0x3, &ldo_v1},
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{S5M8767_LDO5, 0x63, 0x0, 0x3f, 0x63, 0x3, &ldo_v1},
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{S5M8767_LDO6, 0x64, 0x0, 0x3f, 0x64, 0x1, &ldo_v2},
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{S5M8767_LDO7, 0x65, 0x0, 0x3f, 0x65, 0x1, &ldo_v2},
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{S5M8767_LDO8, 0x66, 0x0, 0x3f, 0x66, 0x1, &ldo_v2},
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{S5M8767_LDO9, 0x67, 0x0, 0x3f, 0x67, 0x3, &ldo_v1},
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{S5M8767_LDO10, 0x68, 0x0, 0x3f, 0x68, 0x1, &ldo_v1},
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{S5M8767_LDO11, 0x69, 0x0, 0x3f, 0x69, 0x1, &ldo_v1},
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{S5M8767_LDO12, 0x6a, 0x0, 0x3f, 0x6a, 0x1, &ldo_v1},
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{S5M8767_LDO13, 0x6b, 0x0, 0x3f, 0x6b, 0x3, &ldo_v1},
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{S5M8767_LDO14, 0x6c, 0x0, 0x3f, 0x6c, 0x1, &ldo_v1},
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{S5M8767_LDO15, 0x6d, 0x0, 0x3f, 0x6d, 0x1, &ldo_v2},
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{S5M8767_LDO16, 0x6e, 0x0, 0x3f, 0x6e, 0x1, &ldo_v1},
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{S5M8767_LDO17, 0x6f, 0x0, 0x3f, 0x6f, 0x3, &ldo_v1},
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{S5M8767_LDO18, 0x70, 0x0, 0x3f, 0x70, 0x3, &ldo_v1},
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{S5M8767_LDO19, 0x71, 0x0, 0x3f, 0x71, 0x3, &ldo_v1},
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{S5M8767_LDO20, 0x72, 0x0, 0x3f, 0x72, 0x3, &ldo_v1},
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{S5M8767_LDO21, 0x73, 0x0, 0x3f, 0x73, 0x3, &ldo_v1},
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{S5M8767_LDO22, 0x74, 0x0, 0x3f, 0x74, 0x3, &ldo_v1},
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{S5M8767_LDO23, 0x75, 0x0, 0x3f, 0x75, 0x3, &ldo_v1},
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{S5M8767_LDO24, 0x76, 0x0, 0x3f, 0x76, 0x3, &ldo_v1},
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{S5M8767_LDO25, 0x77, 0x0, 0x3f, 0x77, 0x3, &ldo_v1},
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{S5M8767_LDO26, 0x78, 0x0, 0x3f, 0x78, 0x3, &ldo_v1},
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{S5M8767_LDO27, 0x79, 0x0, 0x3f, 0x79, 0x3, &ldo_v1},
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{S5M8767_LDO28, 0x7a, 0x0, 0x3f, 0x7a, 0x3, &ldo_v1},
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};
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enum {
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ENABLE_SHIFT = 6,
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ENABLE_MASK = 3,
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};
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static int reg_get_value(struct udevice *dev, const struct s5m8767_para *param)
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{
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const struct sec_voltage_desc *desc;
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int ret, uv, val;
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ret = pmic_reg_read(dev->parent, param->vol_addr);
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if (ret < 0)
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return ret;
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desc = param->vol;
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val = (ret >> param->vol_bitpos) & param->vol_bitmask;
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uv = desc->min + val * desc->step;
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return uv;
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}
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static int reg_set_value(struct udevice *dev, const struct s5m8767_para *param,
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int uv)
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{
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const struct sec_voltage_desc *desc;
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int ret, val;
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desc = param->vol;
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if (uv < desc->min || uv > desc->max)
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return -EINVAL;
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val = (uv - desc->min) / desc->step;
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val = (val & param->vol_bitmask) << param->vol_bitpos;
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ret = pmic_clrsetbits(dev->parent, param->vol_addr,
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param->vol_bitmask << param->vol_bitpos,
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val);
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return ret;
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}
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static int s5m8767_ldo_probe(struct udevice *dev)
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{
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struct dm_regulator_uclass_platdata *uc_pdata;
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uc_pdata = dev_get_uclass_platdata(dev);
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uc_pdata->type = REGULATOR_TYPE_LDO;
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uc_pdata->mode_count = 0;
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return 0;
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}
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static int ldo_get_value(struct udevice *dev)
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{
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int ldo = dev->driver_data;
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return reg_get_value(dev, &ldo_param[ldo]);
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}
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static int ldo_set_value(struct udevice *dev, int uv)
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{
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int ldo = dev->driver_data;
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return reg_set_value(dev, &ldo_param[ldo], uv);
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}
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static int reg_get_enable(struct udevice *dev, const struct s5m8767_para *param)
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{
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bool enable;
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int ret;
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ret = pmic_reg_read(dev->parent, param->reg_enaddr);
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if (ret < 0)
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return ret;
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enable = (ret >> ENABLE_SHIFT) & ENABLE_MASK;
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return enable;
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}
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static int reg_set_enable(struct udevice *dev, const struct s5m8767_para *param,
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bool enable)
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{
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int ret;
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ret = pmic_reg_read(dev->parent, param->reg_enaddr);
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if (ret < 0)
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return ret;
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ret = pmic_clrsetbits(dev->parent, param->reg_enaddr,
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ENABLE_MASK << ENABLE_SHIFT,
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enable ? param->reg_enbiton << ENABLE_SHIFT : 0);
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return ret;
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}
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static int ldo_get_enable(struct udevice *dev)
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{
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int ldo = dev->driver_data;
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return reg_get_enable(dev, &ldo_param[ldo]);
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}
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static int ldo_set_enable(struct udevice *dev, bool enable)
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{
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int ldo = dev->driver_data;
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return reg_set_enable(dev, &ldo_param[ldo], enable);
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}
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static int s5m8767_buck_probe(struct udevice *dev)
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{
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struct dm_regulator_uclass_platdata *uc_pdata;
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uc_pdata = dev_get_uclass_platdata(dev);
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uc_pdata->type = REGULATOR_TYPE_BUCK;
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uc_pdata->mode_count = 0;
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return 0;
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}
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static int buck_get_value(struct udevice *dev)
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{
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int buck = dev->driver_data;
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return reg_get_value(dev, &buck_param[buck]);
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}
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static int buck_set_value(struct udevice *dev, int uv)
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{
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int buck = dev->driver_data;
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return reg_set_value(dev, &buck_param[buck], uv);
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}
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static int buck_get_enable(struct udevice *dev)
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{
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int buck = dev->driver_data;
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return reg_get_enable(dev, &buck_param[buck]);
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}
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static int buck_set_enable(struct udevice *dev, bool enable)
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{
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int buck = dev->driver_data;
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return reg_set_enable(dev, &buck_param[buck], enable);
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}
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static const struct dm_regulator_ops s5m8767_ldo_ops = {
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.get_value = ldo_get_value,
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.set_value = ldo_set_value,
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.get_enable = ldo_get_enable,
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.set_enable = ldo_set_enable,
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};
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U_BOOT_DRIVER(s5m8767_ldo) = {
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.name = S5M8767_LDO_DRIVER,
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.id = UCLASS_REGULATOR,
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.ops = &s5m8767_ldo_ops,
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.probe = s5m8767_ldo_probe,
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};
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static const struct dm_regulator_ops s5m8767_buck_ops = {
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.get_value = buck_get_value,
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.set_value = buck_set_value,
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.get_enable = buck_get_enable,
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.set_enable = buck_set_enable,
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};
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U_BOOT_DRIVER(s5m8767_buck) = {
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.name = S5M8767_BUCK_DRIVER,
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.id = UCLASS_REGULATOR,
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.ops = &s5m8767_buck_ops,
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.probe = s5m8767_buck_probe,
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};
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