upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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280 lines
7.1 KiB
280 lines
7.1 KiB
/*
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* (C) Copyright 2000 - 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <mpc824x.h>
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#include <common.h>
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#include <command.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkcpu (void)
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{
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unsigned int pvr = get_pvr ();
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unsigned int version = pvr >> 16;
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unsigned char revision;
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ulong clock = gd->cpu_clk;
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char buf[32];
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puts ("CPU: ");
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switch (version) {
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case CPU_TYPE_8240:
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puts ("MPC8240");
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break;
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case CPU_TYPE_8245:
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puts ("MPC8245");
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break;
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default:
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return -1; /*not valid for this source */
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}
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CONFIG_READ_BYTE (REVID, revision);
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if (revision) {
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printf (" Revision %d.%d",
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(revision & 0xf0) >> 4,
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(revision & 0x0f));
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} else {
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return -1; /* no valid CPU revision info */
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}
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printf (" at %s MHz:", strmhz (buf, clock));
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printf (" %u kB I-Cache", checkicache () >> 10);
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printf (" %u kB D-Cache", checkdcache () >> 10);
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puts ("\n");
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return 0;
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}
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/* ------------------------------------------------------------------------- */
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/* L1 i-cache */
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int checkicache (void)
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{
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/*TODO*/
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return 128 * 4 * 32;
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};
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/* ------------------------------------------------------------------------- */
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/* L1 d-cache */
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int checkdcache (void)
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{
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/*TODO*/
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return 128 * 4 * 32;
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};
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/*------------------------------------------------------------------- */
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int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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ulong msr, addr;
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/* Interrupts and MMU off */
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__asm__ ("mtspr 81, 0");
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/* Interrupts and MMU off */
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__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
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msr &= ~0x1030;
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__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
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/*
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* Trying to execute the next instruction at a non-existing address
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* should cause a machine check, resulting in reset
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*/
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#ifdef CONFIG_SYS_RESET_ADDRESS
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addr = CONFIG_SYS_RESET_ADDRESS;
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#else
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/*
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* note: when CONFIG_SYS_MONITOR_BASE points to a RAM address,
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* CONFIG_SYS_MONITOR_BASE - sizeof (ulong) is usually a valid
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* address. Better pick an address known to be invalid on
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* your system and assign it to CONFIG_SYS_RESET_ADDRESS.
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* "(ulong)-1" used to be a good choice for many systems...
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*/
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addr = CONFIG_SYS_MONITOR_BASE - sizeof (ulong);
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#endif
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((void (*)(void)) addr) ();
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return 1;
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}
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/* ------------------------------------------------------------------------- */
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/*
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* Get timebase clock frequency (like cpu_clk in Hz)
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* This is the sys_logic_clk (memory bus) divided by 4
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*/
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unsigned long get_tbclk (void)
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{
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return ((get_bus_freq (0) + 2L) / 4L);
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}
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/* ------------------------------------------------------------------------- */
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/*
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* The MPC824x has an integrated PCI controller known as the MPC107.
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* The following are MPC107 Bridge Controller and PCI Support functions
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*
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*/
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/*
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* This procedure reads a 32-bit address MPC107 register, and returns
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* a 32 bit value. It swaps the address to little endian before
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* writing it to config address, and swaps the value to big endian
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* before returning to the caller.
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*/
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unsigned int mpc824x_mpc107_getreg (unsigned int regNum)
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{
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unsigned int temp;
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/* swap the addr. to little endian */
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*(volatile unsigned int *) CHRP_REG_ADDR = PCISWAP (regNum);
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temp = *(volatile unsigned int *) CHRP_REG_DATA;
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return PCISWAP (temp); /* swap the data upon return */
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}
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/*
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* This procedure writes a 32-bit address MPC107 register. It swaps
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* the address to little endian before writing it to config address.
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*/
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void mpc824x_mpc107_setreg (unsigned int regNum, unsigned int regVal)
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{
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/* swap the addr. to little endian */
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*(volatile unsigned int *) CHRP_REG_ADDR = PCISWAP (regNum);
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*(volatile unsigned int *) CHRP_REG_DATA = PCISWAP (regVal);
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return;
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}
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/*
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* Write a byte (8 bits) to a memory location.
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*/
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void mpc824x_mpc107_write8 (unsigned int addr, unsigned char data)
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{
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*(unsigned char *) addr = data;
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__asm__ ("sync");
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}
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/*
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* Write a word (16 bits) to a memory location after the value
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* has been byte swapped (big to little endian or vice versa)
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*/
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void mpc824x_mpc107_write16 (unsigned int address, unsigned short data)
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{
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*(volatile unsigned short *) address = BYTE_SWAP_16_BIT (data);
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__asm__ ("sync");
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}
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/*
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* Write a long word (32 bits) to a memory location after the value
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* has been byte swapped (big to little endian or vice versa)
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*/
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void mpc824x_mpc107_write32 (unsigned int address, unsigned int data)
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{
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*(volatile unsigned int *) address = LONGSWAP (data);
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__asm__ ("sync");
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}
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/*
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* Read a byte (8 bits) from a memory location.
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*/
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unsigned char mpc824x_mpc107_read8 (unsigned int addr)
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{
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return *(volatile unsigned char *) addr;
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}
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/*
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* Read a word (16 bits) from a memory location, and byte swap the
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* value before returning to the caller.
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*/
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unsigned short mpc824x_mpc107_read16 (unsigned int address)
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{
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unsigned short retVal;
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retVal = BYTE_SWAP_16_BIT (*(unsigned short *) address);
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return retVal;
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}
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/*
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* Read a long word (32 bits) from a memory location, and byte
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* swap the value before returning to the caller.
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*/
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unsigned int mpc824x_mpc107_read32 (unsigned int address)
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{
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unsigned int retVal;
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retVal = LONGSWAP (*(unsigned int *) address);
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return (retVal);
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}
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/*
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* Read a register in the Embedded Utilities Memory Block address
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* space.
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* Input: regNum - register number + utility base address. Example,
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* the base address of EPIC is 0x40000, the register number
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* being passed is 0x40000+the address of the target register.
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* (See epic.h for register addresses).
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* Output: The 32 bit little endian value of the register.
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*/
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unsigned int mpc824x_eummbar_read (unsigned int regNum)
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{
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unsigned int temp;
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temp = *(volatile unsigned int *) (EUMBBAR_VAL + regNum);
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temp = PCISWAP (temp);
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return temp;
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}
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/*
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* Write a value to a register in the Embedded Utilities Memory
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* Block address space.
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* Input: regNum - register number + utility base address. Example,
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* the base address of EPIC is 0x40000, the register
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* number is 0x40000+the address of the target register.
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* (See epic.h for register addresses).
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* regVal - value to be written to the register.
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*/
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void mpc824x_eummbar_write (unsigned int regNum, unsigned int regVal)
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{
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*(volatile unsigned int *) (EUMBBAR_VAL + regNum) = PCISWAP (regVal);
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return;
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}
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/* ------------------------------------------------------------------------- */
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