upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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190 lines
5.7 KiB
190 lines
5.7 KiB
/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2010
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* Michael Zaidman, Kodak, michael.zaidman@kodak.com
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* post_word_{load|store} cleanup.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _POST_H
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#define _POST_H
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#ifndef __ASSEMBLY__
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#include <common.h>
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#include <asm/io.h>
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#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
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#ifdef CONFIG_SYS_POST_WORD_ADDR
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#define _POST_WORD_ADDR CONFIG_SYS_POST_WORD_ADDR
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#else
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#ifdef CONFIG_MPC5xxx
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#define _POST_WORD_ADDR (MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE)
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#elif defined(CONFIG_MPC512X)
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#define _POST_WORD_ADDR \
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(CONFIG_SYS_SRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
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#elif defined(CONFIG_8xx)
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#define _POST_WORD_ADDR \
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(((immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + CPM_POST_WORD_ADDR)
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#elif defined(CONFIG_MPC8260)
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#include <asm/cpm_8260.h>
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#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR)
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#elif defined(CONFIG_MPC8360)
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#include <asm/immap_qe.h>
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#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR)
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#elif defined (CONFIG_MPC85xx)
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#include <asm/immap_85xx.h>
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#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + offsetof(ccsr_pic_t, tfrr))
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#elif defined (CONFIG_MPC86xx)
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#include <asm/immap_86xx.h>
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#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + offsetof(ccsr_pic_t, tfrr))
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#elif defined (CONFIG_4xx)
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#define _POST_WORD_ADDR \
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(CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
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#endif
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#ifndef _POST_WORD_ADDR
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#error "_POST_WORD_ADDR currently not implemented for this platform!"
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#endif
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#endif /* CONFIG_SYS_POST_WORD_ADDR */
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static inline ulong post_word_load (void)
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{
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return in_le32((volatile void *)(_POST_WORD_ADDR));
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}
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static inline void post_word_store (ulong value)
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{
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out_le32((volatile void *)(_POST_WORD_ADDR), value);
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}
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#endif /* defined (CONFIG_POST) || defined(CONFIG_LOGBUFFER) */
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#endif /* __ASSEMBLY__ */
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#ifdef CONFIG_POST
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#define POST_POWERON 0x01 /* test runs on power-on booting */
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#define POST_NORMAL 0x02 /* test runs on normal booting */
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#define POST_SLOWTEST 0x04 /* test is slow, enabled by key press */
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#define POST_POWERTEST 0x08 /* test runs after watchdog reset */
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#define POST_COLDBOOT 0x80 /* first boot after power-on */
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#define POST_ROM 0x0100 /* test runs in ROM */
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#define POST_RAM 0x0200 /* test runs in RAM */
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#define POST_MANUAL 0x0400 /* test runs on diag command */
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#define POST_REBOOT 0x0800 /* test may cause rebooting */
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#define POST_PREREL 0x1000 /* test runs before relocation */
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#define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */
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#define POST_STOP 0x4000 /* Interrupt POST sequence on fail */
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#define POST_MEM (POST_RAM | POST_ROM)
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#define POST_ALWAYS (POST_NORMAL | \
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POST_SLOWTEST | \
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POST_MANUAL | \
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POST_POWERON )
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#define POST_FAIL_SAVE 0x80
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#define POST_BEFORE 1
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#define POST_AFTER 0
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#define POST_PASSED 1
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#define POST_FAILED 0
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#ifndef __ASSEMBLY__
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struct post_test {
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char *name;
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char *cmd;
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char *desc;
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int flags;
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int (*test) (int flags);
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int (*init_f) (void);
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void (*reloc) (void);
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unsigned long testid;
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};
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int post_init_f (void);
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void post_bootmode_init (void);
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int post_bootmode_get (unsigned int * last_test);
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void post_bootmode_clear (void);
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void post_output_backlog ( void );
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int post_run (char *name, int flags);
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int post_info (char *name);
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int post_log (char *format, ...);
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#ifndef CONFIG_RELOC_FIXUP_WORKS
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void post_reloc (void);
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#endif
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unsigned long post_time_ms (unsigned long base);
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extern struct post_test post_list[];
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extern unsigned int post_list_size;
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extern int post_hotkeys_pressed(void);
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/*
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* If GCC is configured to use a version of GAS that supports
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* the .gnu_attribute directive, it will use that directive to
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* record certain properties of the output code.
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* This feature is new to GCC 4.3.0.
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* .gnu_attribute is new to GAS 2.18.
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*/
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#if (__GNUC__ >= 4 && __GNUC_MINOR__ >= 3)
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/* Tag_GNU_Power_ABI_FP/soft-float */
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#define GNU_FPOST_ATTR asm(".gnu_attribute 4, 2");
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#else
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#define GNU_FPOST_ATTR
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#endif /* __GNUC__ */
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#endif /* __ASSEMBLY__ */
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#define CONFIG_SYS_POST_RTC 0x00000001
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#define CONFIG_SYS_POST_WATCHDOG 0x00000002
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#define CONFIG_SYS_POST_MEMORY 0x00000004
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#define CONFIG_SYS_POST_CPU 0x00000008
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#define CONFIG_SYS_POST_I2C 0x00000010
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#define CONFIG_SYS_POST_CACHE 0x00000020
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#define CONFIG_SYS_POST_UART 0x00000040
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#define CONFIG_SYS_POST_ETHER 0x00000080
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#define CONFIG_SYS_POST_SPI 0x00000100
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#define CONFIG_SYS_POST_USB 0x00000200
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#define CONFIG_SYS_POST_SPR 0x00000400
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#define CONFIG_SYS_POST_SYSMON 0x00000800
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#define CONFIG_SYS_POST_DSP 0x00001000
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#define CONFIG_SYS_POST_OCM 0x00002000
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#define CONFIG_SYS_POST_FPU 0x00004000
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#define CONFIG_SYS_POST_ECC 0x00008000
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#define CONFIG_SYS_POST_BSPEC1 0x00010000
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#define CONFIG_SYS_POST_BSPEC2 0x00020000
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#define CONFIG_SYS_POST_BSPEC3 0x00040000
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#define CONFIG_SYS_POST_BSPEC4 0x00080000
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#define CONFIG_SYS_POST_BSPEC5 0x00100000
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#define CONFIG_SYS_POST_CODEC 0x00200000
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#define CONFIG_SYS_POST_COPROC 0x00400000
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#endif /* CONFIG_POST */
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#endif /* _POST_H */
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