upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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219 lines
5.6 KiB
219 lines
5.6 KiB
/*
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* Copyright 2009(C) Marvell International Ltd. and its affiliates
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* Prafulla Wadaskar <prafulla@marvell.com>
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*
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* Based on drivers/mtd/spi/stmicro.c
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*
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* Copyright 2008, Network Appliance Inc.
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* Jason McMullan <mcmullan@netapp.com>
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*
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* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <common.h>
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#include <malloc.h>
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#include <spi_flash.h>
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#include "spi_flash_internal.h"
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/* MX25xx-specific commands */
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#define CMD_MX25XX_WREN 0x06 /* Write Enable */
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#define CMD_MX25XX_WRDI 0x04 /* Write Disable */
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#define CMD_MX25XX_RDSR 0x05 /* Read Status Register */
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#define CMD_MX25XX_WRSR 0x01 /* Write Status Register */
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#define CMD_MX25XX_READ 0x03 /* Read Data Bytes */
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#define CMD_MX25XX_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
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#define CMD_MX25XX_PP 0x02 /* Page Program */
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#define CMD_MX25XX_SE 0x20 /* Sector Erase */
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#define CMD_MX25XX_BE 0xD8 /* Block Erase */
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#define CMD_MX25XX_CE 0xc7 /* Chip Erase */
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#define CMD_MX25XX_DP 0xb9 /* Deep Power-down */
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#define CMD_MX25XX_RES 0xab /* Release from DP, and Read Signature */
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struct macronix_spi_flash_params {
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u16 idcode;
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u16 page_size;
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u16 pages_per_sector;
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u16 sectors_per_block;
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u16 nr_blocks;
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const char *name;
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};
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struct macronix_spi_flash {
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struct spi_flash flash;
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const struct macronix_spi_flash_params *params;
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};
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static inline struct macronix_spi_flash *to_macronix_spi_flash(struct spi_flash
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*flash)
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{
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return container_of(flash, struct macronix_spi_flash, flash);
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}
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static const struct macronix_spi_flash_params macronix_spi_flash_table[] = {
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{
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.idcode = 0x2015,
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.page_size = 256,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 32,
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.name = "MX25L1605D",
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},
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{
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.idcode = 0x2016,
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.page_size = 256,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 64,
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.name = "MX25L3205D",
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},
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{
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.idcode = 0x2017,
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.page_size = 256,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 128,
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.name = "MX25L6405D",
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},
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{
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.idcode = 0x2018,
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.page_size = 256,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 256,
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.name = "MX25L12805D",
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},
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{
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.idcode = 0x2618,
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.page_size = 256,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 256,
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.name = "MX25L12855E",
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},
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};
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static int macronix_write(struct spi_flash *flash,
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u32 offset, size_t len, const void *buf)
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{
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struct macronix_spi_flash *mcx = to_macronix_spi_flash(flash);
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unsigned long page_addr;
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unsigned long byte_addr;
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unsigned long page_size;
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size_t chunk_len;
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size_t actual;
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int ret;
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u8 cmd[4];
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page_size = mcx->params->page_size;
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page_addr = offset / page_size;
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byte_addr = offset % page_size;
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ret = spi_claim_bus(flash->spi);
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if (ret) {
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debug("SF: Unable to claim SPI bus\n");
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return ret;
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}
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ret = 0;
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for (actual = 0; actual < len; actual += chunk_len) {
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chunk_len = min(len - actual, page_size - byte_addr);
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cmd[0] = CMD_MX25XX_PP;
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cmd[1] = page_addr >> 8;
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cmd[2] = page_addr;
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cmd[3] = byte_addr;
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debug
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("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %d\n",
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buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
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ret = spi_flash_cmd(flash->spi, CMD_MX25XX_WREN, NULL, 0);
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if (ret < 0) {
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debug("SF: Enabling Write failed\n");
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break;
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}
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ret = spi_flash_cmd_write(flash->spi, cmd, 4,
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buf + actual, chunk_len);
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if (ret < 0) {
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debug("SF: Macronix Page Program failed\n");
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break;
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}
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ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
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if (ret)
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break;
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page_addr++;
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byte_addr = 0;
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}
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debug("SF: Macronix: Successfully programmed %u bytes @ 0x%x\n",
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len, offset);
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spi_release_bus(flash->spi);
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return ret;
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}
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int macronix_erase(struct spi_flash *flash, u32 offset, size_t len)
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{
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return spi_flash_cmd_erase(flash, CMD_MX25XX_BE, offset, len);
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}
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struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode)
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{
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const struct macronix_spi_flash_params *params;
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struct macronix_spi_flash *mcx;
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unsigned int i;
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u16 id = idcode[2] | idcode[1] << 8;
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for (i = 0; i < ARRAY_SIZE(macronix_spi_flash_table); i++) {
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params = ¯onix_spi_flash_table[i];
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if (params->idcode == id)
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break;
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}
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if (i == ARRAY_SIZE(macronix_spi_flash_table)) {
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debug("SF: Unsupported Macronix ID %04x\n", id);
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return NULL;
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}
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mcx = malloc(sizeof(*mcx));
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if (!mcx) {
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debug("SF: Failed to allocate memory\n");
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return NULL;
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}
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mcx->params = params;
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mcx->flash.spi = spi;
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mcx->flash.name = params->name;
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mcx->flash.write = macronix_write;
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mcx->flash.erase = macronix_erase;
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mcx->flash.read = spi_flash_cmd_read_fast;
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mcx->flash.sector_size = params->page_size * params->pages_per_sector
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* params->sectors_per_block;
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mcx->flash.size = mcx->flash.sector_size * params->nr_blocks;
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return &mcx->flash;
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}
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