upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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335 lines
8.9 KiB
335 lines
8.9 KiB
/*
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* Mostly done after the Scitech Bios emulation
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* Written by Hans-Jörg Frieden
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* Hyperion Entertainment
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*/
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#include "x86emu.h"
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#include "glue.h"
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#undef DEBUG
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#ifdef DEBUG
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#define PRINTF(fmt, args...) printf(fmt, ## args)
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#else
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#define PRINTF(fmt, args...)
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#endif
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#define BIOS_SEG 0xFFF0
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#define PCIBIOS_SUCCESSFUL 0
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#define PCIBIOS_DEVICE_NOT_FOUND 0x86
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typedef unsigned char UBYTE;
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typedef unsigned short UWORD;
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typedef unsigned long ULONG;
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typedef char BYTE;
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typedef short WORT;
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typedef long LONG;
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static inline UBYTE read_byte(volatile UBYTE* from)
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{
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int x;
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asm volatile ("lbz %0,%1\n eieio" : "=r" (x) : "m" (*from));
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return (UBYTE)x;
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}
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static inline void write_byte(volatile UBYTE *to, int x)
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{
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asm volatile ("stb %1,%0\n eieio" : "=m" (*to) : "r" (x));
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}
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static inline UWORD read_word_little(volatile UWORD *from)
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{
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int x;
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asm volatile ("lhbrx %0,0,%1\n eieio" : "=r" (x) : "r" (from), "m" (*from));
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return (UWORD)x;
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}
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static inline UWORD read_word_big(volatile UWORD *from)
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{
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int x;
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asm volatile ("lhz %0,%1\n eieio" : "=r" (x) : "m" (*from));
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return (UWORD)x;
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}
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static inline void write_word_little(volatile UWORD *to, int x)
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{
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asm volatile ("sthbrx %1,0,%2\n eieio" : "=m" (*to) : "r" (x), "r" (to));
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}
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static inline void write_word_big(volatile UWORD *to, int x)
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{
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asm volatile ("sth %1,%0\n eieio" : "=m" (*to) : "r" (x));
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}
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static inline ULONG read_long_little(volatile ULONG *from)
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{
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unsigned long x;
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asm volatile ("lwbrx %0,0,%1\n eieio" : "=r" (x) : "r" (from), "m"(*from));
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return (ULONG)x;
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}
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static inline ULONG read_long_big(volatile ULONG *from)
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{
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unsigned long x;
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asm volatile ("lwz %0,%1\n eieio" : "=r" (x) : "m" (*from));
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return (ULONG)x;
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}
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static inline void write_long_little(volatile ULONG *to, ULONG x)
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{
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asm volatile ("stwbrx %1,0,%2\n eieio" : "=m" (*to) : "r" (x), "r" (to));
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}
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static inline void write_long_big(volatile ULONG *to, ULONG x)
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{
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asm volatile ("stw %1,%0\n eieio" : "=m" (*to) : "r" (x));
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}
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#define port_to_mem(from) (0xFE000000|(from))
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#define in_byte(from) read_byte( (UBYTE *)port_to_mem(from))
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#define in_word(from) read_word_little((UWORD *)port_to_mem(from))
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#define in_long(from) read_long_little((ULONG *)port_to_mem(from))
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#define out_byte(to, val) write_byte((UBYTE *)port_to_mem(to), val)
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#define out_word(to, val) write_word_little((UWORD *)port_to_mem(to), val)
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#define out_long(to, val) write_long_little((ULONG *)port_to_mem(to), val)
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static void X86API undefined_intr(int intno)
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{
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extern u16 A1_rdw(u32 addr);
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if (A1_rdw(intno * 4 + 2) == BIOS_SEG)
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{
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PRINTF("Undefined interrupt %xh called AX = %xh, BX = %xh, CX = %xh, DX = %xh\n",
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intno, M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX);
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X86EMU_halt_sys();
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}
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else
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{
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PRINTF("Calling interrupt %xh, AL=%xh, AH=%xh\n", intno, M.x86.R_AL, M.x86.R_AH);
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X86EMU_prepareForInt(intno);
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}
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}
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static void X86API int42(int intno);
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static void X86API int15(int intno);
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static void X86API int10(int intno)
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{
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if (A1_rdw(intno*4+2) == BIOS_SEG)
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int42(intno);
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else
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{
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PRINTF("int10: branching to %04X:%04X, AL=%xh, AH=%xh\n", A1_rdw(intno*4+2), A1_rdw(intno*4),
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M.x86.R_AL, M.x86.R_AH);
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X86EMU_prepareForInt(intno);
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}
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}
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static void X86API int1A(int intno)
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{
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int device;
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switch(M.x86.R_AX)
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{
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case 0xB101: // PCI Bios Present?
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M.x86.R_AL = 0x00;
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M.x86.R_EDX = 0x20494350;
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M.x86.R_BX = 0x0210;
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M.x86.R_CL = 3;
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CLEAR_FLAG(F_CF);
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break;
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case 0xB102: // Find device
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device = mypci_find_device(M.x86.R_DX, M.x86.R_CX, M.x86.R_SI);
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if (device != -1)
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{
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M.x86.R_AH = PCIBIOS_SUCCESSFUL;
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M.x86.R_BH = mypci_bus(device);
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M.x86.R_BL = mypci_devfn(device);
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}
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else
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{
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M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND;
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}
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CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
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break;
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case 0xB103: // Find PCI class code
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M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND;
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//printf("Find by class not yet implmented");
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CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
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break;
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case 0xB108: // read config byte
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M.x86.R_CL = mypci_read_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
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M.x86.R_AH = PCIBIOS_SUCCESSFUL;
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CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
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//printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
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// M.x86.R_CL);
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break;
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case 0xB109: // read config word
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M.x86.R_CX = mypci_read_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
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M.x86.R_AH = PCIBIOS_SUCCESSFUL;
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CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
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//printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
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// M.x86.R_CX);
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break;
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case 0xB10A: // read config dword
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M.x86.R_ECX = mypci_read_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
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M.x86.R_AH = PCIBIOS_SUCCESSFUL;
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CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
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//printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
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// M.x86.R_ECX);
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break;
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case 0xB10B: // write config byte
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mypci_write_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CL);
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M.x86.R_AH = PCIBIOS_SUCCESSFUL;
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CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
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//printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
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// M.x86.R_CL);
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break;
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case 0xB10C: // write config word
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mypci_write_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CX);
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M.x86.R_AH = PCIBIOS_SUCCESSFUL;
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CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
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//printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
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// M.x86.R_CX);
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break;
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case 0xB10D: // write config dword
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mypci_write_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_ECX);
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M.x86.R_AH = PCIBIOS_SUCCESSFUL;
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CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
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//printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
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// M.x86.R_ECX);
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break;
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default:
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PRINTF("BIOS int %xh: Unknown function AX=%04xh\n", intno, M.x86.R_AX);
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}
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}
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void bios_init(void)
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{
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int i;
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X86EMU_intrFuncs bios_intr_tab[256];
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for (i=0; i<256; i++)
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{
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write_long_little(M.mem_base+i*4, BIOS_SEG<<16);
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bios_intr_tab[i] = undefined_intr;
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}
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bios_intr_tab[0x10] = int10;
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bios_intr_tab[0x1A] = int1A;
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bios_intr_tab[0x42] = int42;
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bios_intr_tab[0x15] = int15;
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bios_intr_tab[0x6D] = int42;
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X86EMU_setupIntrFuncs(bios_intr_tab);
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video_init();
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}
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unsigned char setup_40x25[] =
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{
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0x38, 0x28, 0x2d, 0x0a, 0x1f, 6, 0x19,
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0x1c, 2, 7, 6, 7, 0, 0, 0, 0
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};
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unsigned char setup_80x25[] =
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{
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0x71, 0x50, 0x5a, 0x0a, 0x1f, 6, 0x19,
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0x1c, 2, 7, 6, 7, 0, 0, 0, 0
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};
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unsigned char setup_graphics[] =
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{
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0x38, 0x28, 0x20, 0x0a, 0x7f, 6, 0x64,
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0x70, 2, 1, 6, 7, 0, 0, 0, 0
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};
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unsigned char setup_bw[] =
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{
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0x61, 0x50, 0x52, 0x0f, 0x19, 6, 0x19,
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0x19, 2, 0x0d, 0x0b, 0x0c, 0, 0, 0, 0
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};
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unsigned char * setup_modes[] =
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{
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setup_40x25, // mode 0: 40x25 bw text
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setup_40x25, // mode 1: 40x25 col text
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setup_80x25, // mode 2: 80x25 bw text
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setup_80x25, // mode 3: 80x25 col text
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setup_graphics, // mode 4: 320x200 col graphics
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setup_graphics, // mode 5: 320x200 bw graphics
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setup_graphics, // mode 6: 640x200 bw graphics
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setup_bw // mode 7: 80x25 mono text
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};
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unsigned int setup_cols[] =
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{
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40, 40, 80, 80, 40, 40, 80, 80
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};
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unsigned char setup_modesets[] =
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{
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0x2C, 0x28, 0x2D, 0x29, 0x2A, 0x2E, 0x1E, 0x29
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};
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unsigned int setup_bufsize[] =
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{
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2048, 2048, 4096, 2096, 16384, 16384, 16384, 4096
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};
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void bios_set_mode(int mode)
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{
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int i;
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unsigned char mode_set = setup_modesets[mode]; // Control register value
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unsigned char *setup_regs = setup_modes[mode]; // Register 3D4 Array
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// Switch video off
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out_byte(0x3D8, mode_set & 0x37);
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// Set up parameters at 3D4h
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for (i=0; i<16; i++)
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{
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out_byte(0x3D4, (unsigned char)i);
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out_byte(0x3D5, *setup_regs);
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setup_regs++;
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}
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// Enable video
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out_byte(0x3D8, mode_set);
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// Set overscan
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if (mode == 6) out_byte(0x3D9, 0x3F);
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else out_byte(0x3D9, 0x30);
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}
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static void bios_print_string(void)
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{
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extern void video_bios_print_string(char *string, int x, int y, int attr, int count);
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char *s = (char *)(M.x86.R_ES<<4) + M.x86.R_BP;
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int attr;
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if (M.x86.R_AL & 0x02) attr = - 1;
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else attr = M.x86.R_BL;
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video_bios_print_string(s, M.x86.R_DH, M.x86.R_DL, attr, M.x86.R_CX);
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}
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static void X86API int42(int intno)
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{
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switch (M.x86.R_AH)
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{
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case 0x00:
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bios_set_mode(M.x86.R_AL);
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break;
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case 0x13:
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bios_print_string();
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break;
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default:
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PRINTF("Warning: VIDEO BIOS interrupt %xh unimplemented function %xh, AL = %xh\n",
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intno, M.x86.R_AH, M.x86.R_AL);
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}
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}
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static void X86API int15(int intno)
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{
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PRINTF("Called interrupt 15h: AX = %xh, BX = %xh, CX = %xh, DX = %xh\n",
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M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX);
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}
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