upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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49 lines
1.0 KiB
49 lines
1.0 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
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*/
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#ifndef _BRASWELL_IOMAP_H_
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#define _BRASWELL_IOMAP_H_
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/* Memory Mapped IO bases */
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/* Power Management Controller */
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#define PMC_BASE_ADDRESS 0xfed03000
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#define PMC_BASE_SIZE 0x400
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/* Power Management Unit */
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#define PUNIT_BASE_ADDRESS 0xfed05000
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#define PUNIT_BASE_SIZE 0x800
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/* Intel Legacy Block */
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#define ILB_BASE_ADDRESS 0xfed08000
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#define ILB_BASE_SIZE 0x400
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/* SPI Bus */
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#define SPI_BASE_ADDRESS 0xfed01000
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#define SPI_BASE_SIZE 0x400
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/* Root Complex Base Address */
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#define RCBA_BASE_ADDRESS 0xfed1c000
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#define RCBA_BASE_SIZE 0x400
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/* IO Memory */
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#define IO_BASE_ADDRESS 0xfed80000
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#define IO_BASE_SIZE 0x4000
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/* MODPHY */
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#define MPHY_BASE_ADDRESS 0xfef00000
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#define MPHY_BASE_SIZE 0x100000
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/* IO Port bases */
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#define ACPI_BASE_ADDRESS 0x400
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#define ACPI_BASE_SIZE 0x80
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#define GPIO_BASE_ADDRESS 0x500
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#define GPIO_BASE_SIZE 0x100
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#define SMBUS_BASE_ADDRESS 0xefa0
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#endif /* _BRASWELL_IOMAP_H_ */
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