upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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72 lines
1.6 KiB
72 lines
1.6 KiB
/*
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* Copyright (c) 2015, Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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* All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <dm.h>
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#include <pci.h>
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#include <usb.h>
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#include "xhci.h"
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static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
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struct xhci_hcor **ret_hcor)
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{
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struct xhci_hccr *hccr;
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struct xhci_hcor *hcor;
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u32 cmd;
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hccr = (struct xhci_hccr *)dm_pci_map_bar(dev,
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PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
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hcor = (struct xhci_hcor *)((uintptr_t) hccr +
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HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
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debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
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(u32)hccr, (u32)hcor,
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(u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
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*ret_hccr = hccr;
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*ret_hcor = hcor;
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/* enable busmaster */
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dm_pci_read_config32(dev, PCI_COMMAND, &cmd);
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cmd |= PCI_COMMAND_MASTER;
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dm_pci_write_config32(dev, PCI_COMMAND, cmd);
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}
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static int xhci_pci_probe(struct udevice *dev)
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{
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struct xhci_hccr *hccr;
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struct xhci_hcor *hcor;
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xhci_pci_init(dev, &hccr, &hcor);
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return xhci_register(dev, hccr, hcor);
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}
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static const struct udevice_id xhci_pci_ids[] = {
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{ .compatible = "xhci-pci" },
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{ }
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};
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U_BOOT_DRIVER(xhci_pci) = {
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.name = "xhci_pci",
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.id = UCLASS_USB,
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.probe = xhci_pci_probe,
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.remove = xhci_deregister,
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.of_match = xhci_pci_ids,
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.ops = &xhci_usb_ops,
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.platdata_auto_alloc_size = sizeof(struct usb_platdata),
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.priv_auto_alloc_size = sizeof(struct xhci_ctrl),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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static struct pci_device_id xhci_pci_supported[] = {
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{ PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0) },
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{},
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};
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U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported);
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