upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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112 lines
3.6 KiB
112 lines
3.6 KiB
/*
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* (C) Copyright 2004 Atmark Techno, Inc.
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*
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* Yasushi SHOJI <yashi@atmark-techno.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_MICROBLAZE 1 /* This is an MicroBlaze CPU */
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#define CONFIG_SUZAKU 1 /* on an SUZAKU Board */
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/*-----------------------------------------------------------------------
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* Start addresses for the final memory configuration
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* (Set up by the startup code)
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* Please note that CFG_SDRAM_BASE _must_ start at 0
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*/
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#define CFG_SDRAM_BASE 0x80000000
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#define CFG_SDRAM_SIZE 0x01000000
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#define CFG_FLASH_BASE 0xfff00000
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#define CFG_FLASH_SIZE 0x00400000
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#define CFG_RESET_ADDRESS 0xfff00100
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#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
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#define CFG_MONITOR_BASE (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - (1024 * 1024))
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#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */
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#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024))
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#define CONFIG_XILINX_UARTLITE
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#define CONFIG_BAUDRATE 115200
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#define CFG_BAUDRATE_TABLE { 115200 }
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/* System Register (GPIO) */
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#define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000
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#define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0)
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CFG_UART1_BASE (0xFFFF2000)
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#define CONFIG_SERIAL_BASE CFG_UART1_BASE
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "SUZAKU> " /* Monitor Command Prompt */
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#define CFG_CBSIZE 256
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* default load address */
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 1 /* max number of sectors on one chip */
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/*-----------------------------------------------------------------------
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* NVRAM organization
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*/
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#define CFG_ENV_IS_NOWHERE 1
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#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
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#define CFG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
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/*-----------------------------------------------------------------------
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* Definitions for initial stack pointer and data area (in DPRAM)
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*/
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#define CFG_INIT_RAM_ADDR 0x80000000 /* inside of SDRAM */
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#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
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#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
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#endif /* __CONFIG_H */
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