upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Paul Burton cc4f36435f MIPS: Break out of cache loops for unimplemented caches ... If we run on a CPU which doesn't implement a particular cache then we would previously get stuck in an infinite loop, executing a cache op on the first "line" of the missing cache & then incrementing the address by 0. This was being avoided for the L2 caches, but not for the L1s. Fix this by generalising the check for a zero line size & avoiding the cache op loop when this is the case. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: u-boot@lists.denx.de		7 years ago
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Makefile	MIPS: Stop building position independent code	8 years ago
ashldi3.c	…
ashrdi3.c	…
asm-offsets.c	…
bootm.c	env: Rename getenv/_f() to env_get()	8 years ago
cache.c	MIPS: Break out of cache loops for unimplemented caches	7 years ago
cache_init.S	…
genex.S	…
libgcc.h	…
lshrdi3.c	…
reloc.c	MIPS: Stop building position independent code	8 years ago
stack.c	…
traps.c	…