upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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284 lines
5.7 KiB
284 lines
5.7 KiB
/*
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* (C) Copyright 2003
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* Gleb Natapov <gnatapov@mrv.com>
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* Some bits are taken from linux driver writen by adrian@humboldt.co.uk
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*
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* Hardware I2C driver for MPC107 PCI bridge.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#undef I2CDBG
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#ifdef CONFIG_HARD_I2C
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#include <i2c.h>
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#define TIMEOUT (CONFIG_SYS_HZ/4)
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#define I2C_Addr ((unsigned *)(CONFIG_SYS_EUMB_ADDR + 0x3000))
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#define I2CADR &I2C_Addr[0]
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#define I2CFDR &I2C_Addr[1]
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#define I2CCCR &I2C_Addr[2]
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#define I2CCSR &I2C_Addr[3]
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#define I2CCDR &I2C_Addr[4]
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#define MPC107_CCR_MEN 0x80
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#define MPC107_CCR_MIEN 0x40
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#define MPC107_CCR_MSTA 0x20
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#define MPC107_CCR_MTX 0x10
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#define MPC107_CCR_TXAK 0x08
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#define MPC107_CCR_RSTA 0x04
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#define MPC107_CSR_MCF 0x80
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#define MPC107_CSR_MAAS 0x40
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#define MPC107_CSR_MBB 0x20
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#define MPC107_CSR_MAL 0x10
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#define MPC107_CSR_SRW 0x04
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#define MPC107_CSR_MIF 0x02
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#define MPC107_CSR_RXAK 0x01
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#define I2C_READ 1
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#define I2C_WRITE 0
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/* taken from linux include/asm-ppc/io.h */
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inline unsigned in_le32 (volatile unsigned *addr)
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{
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unsigned ret;
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__asm__ __volatile__ ("lwbrx %0,0,%1;\n"
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"twi 0,%0,0;\n"
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"isync":"=r" (ret): "r" (addr), "m" (*addr));
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return ret;
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}
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inline void out_le32 (volatile unsigned *addr, int val)
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{
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__asm__ __volatile__ ("stwbrx %1,0,%2; eieio":"=m" (*addr):"r" (val),
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"r" (addr));
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}
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#define writel(val, addr) out_le32(addr, val)
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#define readl(addr) in_le32(addr)
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void i2c_init (int speed, int slaveadd)
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{
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/* stop I2C controller */
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writel (0x0, I2CCCR);
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/* set clock */
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writel (0x1020, I2CFDR);
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/* write slave address */
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writel (slaveadd, I2CADR);
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/* clear status register */
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writel (0x0, I2CCSR);
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/* start I2C controller */
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writel (MPC107_CCR_MEN, I2CCCR);
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return;
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}
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static __inline__ int i2c_wait4bus (void)
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{
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ulong timeval = get_timer (0);
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while (readl (I2CCSR) & MPC107_CSR_MBB)
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if (get_timer (timeval) > TIMEOUT)
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return -1;
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return 0;
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}
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static __inline__ int i2c_wait (int write)
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{
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u32 csr;
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ulong timeval = get_timer (0);
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do {
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csr = readl (I2CCSR);
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if (!(csr & MPC107_CSR_MIF))
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continue;
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writel (0x0, I2CCSR);
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if (csr & MPC107_CSR_MAL) {
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#ifdef I2CDBG
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printf ("i2c_wait: MAL\n");
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#endif
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return -1;
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}
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if (!(csr & MPC107_CSR_MCF)) {
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#ifdef I2CDBG
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printf ("i2c_wait: unfinished\n");
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#endif
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return -1;
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}
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if (write == I2C_WRITE && (csr & MPC107_CSR_RXAK)) {
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#ifdef I2CDBG
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printf ("i2c_wait: No RXACK\n");
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#endif
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return -1;
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}
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return 0;
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} while (get_timer (timeval) < TIMEOUT);
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#ifdef I2CDBG
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printf ("i2c_wait: timed out\n");
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#endif
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return -1;
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}
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static __inline__ int i2c_write_addr (u8 dev, u8 dir, int rsta)
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{
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writel (MPC107_CCR_MEN | MPC107_CCR_MSTA | MPC107_CCR_MTX |
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(rsta ? MPC107_CCR_RSTA : 0), I2CCCR);
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writel ((dev << 1) | dir, I2CCDR);
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if (i2c_wait (I2C_WRITE) < 0)
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return 0;
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return 1;
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}
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static __inline__ int __i2c_write (u8 * data, int length)
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{
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int i;
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writel (MPC107_CCR_MEN | MPC107_CCR_MSTA | MPC107_CCR_MTX, I2CCCR);
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for (i = 0; i < length; i++) {
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writel (data[i], I2CCDR);
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if (i2c_wait (I2C_WRITE) < 0)
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break;
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}
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return i;
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}
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static __inline__ int __i2c_read (u8 * data, int length)
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{
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int i;
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writel (MPC107_CCR_MEN | MPC107_CCR_MSTA |
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((length == 1) ? MPC107_CCR_TXAK : 0), I2CCCR);
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/* dummy read */
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readl (I2CCDR);
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for (i = 0; i < length; i++) {
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if (i2c_wait (I2C_READ) < 0)
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break;
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/* Generate ack on last next to last byte */
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if (i == length - 2)
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writel (MPC107_CCR_MEN | MPC107_CCR_MSTA |
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MPC107_CCR_TXAK, I2CCCR);
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/* Generate stop on last byte */
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if (i == length - 1)
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writel (MPC107_CCR_MEN | MPC107_CCR_TXAK, I2CCCR);
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data[i] = readl (I2CCDR);
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}
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return i;
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}
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int i2c_read (u8 dev, uint addr, int alen, u8 * data, int length)
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{
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int i = 0;
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u8 *a = (u8 *) & addr;
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if (i2c_wait4bus () < 0)
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goto exit;
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if (i2c_write_addr (dev, I2C_WRITE, 0) == 0)
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goto exit;
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if (__i2c_write (&a[4 - alen], alen) != alen)
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goto exit;
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if (i2c_write_addr (dev, I2C_READ, 1) == 0)
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goto exit;
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i = __i2c_read (data, length);
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exit:
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writel (MPC107_CCR_MEN, I2CCCR);
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return !(i == length);
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}
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int i2c_write (u8 dev, uint addr, int alen, u8 * data, int length)
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{
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int i = 0;
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u8 *a = (u8 *) & addr;
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if (i2c_wait4bus () < 0)
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goto exit;
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if (i2c_write_addr (dev, I2C_WRITE, 0) == 0)
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goto exit;
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if (__i2c_write (&a[4 - alen], alen) != alen)
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goto exit;
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i = __i2c_write (data, length);
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exit:
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writel (MPC107_CCR_MEN, I2CCCR);
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return !(i == length);
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}
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int i2c_probe (uchar chip)
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{
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int tmp;
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/*
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* Try to read the first location of the chip. The underlying
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* driver doesn't appear to support sending just the chip address
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* and looking for an <ACK> back.
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*/
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udelay (10000);
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return i2c_read (chip, 0, 1, (uchar *) &tmp, 1);
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}
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uchar i2c_reg_read (uchar i2c_addr, uchar reg)
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{
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uchar buf[1];
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i2c_read (i2c_addr, reg, 1, buf, 1);
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return (buf[0]);
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}
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void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val)
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{
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i2c_write (i2c_addr, reg, 1, &val, 1);
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}
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#endif /* CONFIG_HARD_I2C */
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