upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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87 lines
2.4 KiB
87 lines
2.4 KiB
/*
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* (C) Copyright 2008-2009
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <asm/ppc4xx_config.h>
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struct ppc4xx_config ppc4xx_config_val[] = {
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{
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"600-nor", "NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100",
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{
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0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0,
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0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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}
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},
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{
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"600-nand", "NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100",
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{
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0x86, 0x80, 0xce, 0x1f, 0x79, 0x90, 0x01, 0xa0,
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0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
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}
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},
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{
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"800-nor", "NOR CPU: 800 PLB: 200 OPB: 100 EBC: 100",
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{
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0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0,
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0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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}
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},
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{
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"800-nand", "NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100",
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{
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0x86, 0x80, 0xba, 0x14, 0x99, 0x90, 0x01, 0xa0,
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0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
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}
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},
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{
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"1000-nor", "NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100",
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{
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0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0,
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0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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}
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},
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{
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"1000-nand", "NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100",
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{
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0x86, 0x82, 0x96, 0x19, 0xb9, 0x90, 0x01, 0xa0,
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0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
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}
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},
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{
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"1066-nor", "NOR CPU:1066 PLB: 266 OPB: 88 EBC: 88",
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{
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0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0,
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0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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}
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},
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{
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"1066-nand", "NAND CPU:1066 PLB: 266 OPB: 88 EBC: 88",
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{
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0x86, 0x80, 0xb3, 0x01, 0x9d, 0x90, 0x01, 0xa0,
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0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
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}
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},
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};
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int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);
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