upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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323 lines
11 KiB
323 lines
11 KiB
/****************************************************************************
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*
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* BIOS emulator and interface
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* to Realmode X86 Emulator Library
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*
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* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
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* Jason Jin <Jason.jin@freescale.com>
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*
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* Copyright (C) 1996-1999 SciTech Software, Inc.
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*
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* ========================================================================
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*
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* Permission to use, copy, modify, distribute, and sell this software and
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* its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of the authors not be used
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* in advertising or publicity pertaining to distribution of the software
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* without specific, written prior permission. The authors makes no
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* representations about the suitability of this software for any purpose.
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* It is provided "as is" without express or implied warranty.
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*
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* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
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* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
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* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*
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* ========================================================================
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*
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* Language: ANSI C
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* Environment: Any
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* Developer: Kendall Bennett
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*
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* Description: Module implementing the BIOS specific functions.
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*
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* Jason ported this file to u-boot to run the ATI video card
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* video BIOS.
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*
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****************************************************************************/
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#include "biosemui.h"
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#if defined(CONFIG_BIOSEMU)
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/*----------------------------- Implementation ----------------------------*/
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/****************************************************************************
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PARAMETERS:
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intno - Interrupt number being serviced
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REMARKS:
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Handler for undefined interrupts.
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****************************************************************************/
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static void X86API undefined_intr(int intno)
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{
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if (BE_rdw(intno * 4 + 2) == BIOS_SEG) {
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DB(printf("biosEmu: undefined interrupt %xh called!\n", intno);)
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} else
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X86EMU_prepareForInt(intno);
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}
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/****************************************************************************
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PARAMETERS:
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intno - Interrupt number being serviced
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REMARKS:
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This function handles the default system BIOS Int 10h (the default is stored
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in the Int 42h vector by the system BIOS at bootup). We only need to handle
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a small number of special functions used by the BIOS during POST time.
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****************************************************************************/
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static void X86API int42(int intno)
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{
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if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
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if (M.x86.R_AL == 0) {
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/* Enable CPU accesses to video memory */
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PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8) 0x02);
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return;
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} else if (M.x86.R_AL == 1) {
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/* Disable CPU accesses to video memory */
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PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02);
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return;
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}
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#ifdef DEBUG
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else {
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printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",
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M.x86.R_AL);
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}
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#endif
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}
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#ifdef DEBUG
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else {
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printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",
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M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
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}
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#endif
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}
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/****************************************************************************
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PARAMETERS:
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intno - Interrupt number being serviced
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REMARKS:
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This function handles the default system BIOS Int 10h. If the POST code
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has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this
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by simply calling the int42 interrupt handler above. Very early in the
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BIOS POST process, the vector gets replaced and we simply let the real
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mode interrupt handler process the interrupt.
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****************************************************************************/
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static void X86API int10(int intno)
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{
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if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
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int42(intno);
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else
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X86EMU_prepareForInt(intno);
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}
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/* Result codes returned by the PCI BIOS */
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#define SUCCESSFUL 0x00
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#define FUNC_NOT_SUPPORT 0x81
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#define BAD_VENDOR_ID 0x83
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#define DEVICE_NOT_FOUND 0x86
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#define BAD_REGISTER_NUMBER 0x87
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#define SET_FAILED 0x88
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#define BUFFER_TOO_SMALL 0x89
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/****************************************************************************
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PARAMETERS:
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intno - Interrupt number being serviced
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REMARKS:
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This function handles the default Int 1Ah interrupt handler for the real
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mode code, which provides support for the PCI BIOS functions. Since we only
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want to allow the real mode BIOS code *only* see the PCI config space for
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its own device, we only return information for the specific PCI config
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space that we have passed in to the init function. This solves problems
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when using the BIOS to warm boot a secondary adapter when there is an
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identical adapter before it on the bus (some BIOS'es get confused in this
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case).
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****************************************************************************/
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static void X86API int1A(int unused)
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{
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u16 pciSlot;
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#ifdef __KERNEL__
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u8 interface, subclass, baseclass;
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/* Initialise the PCI slot number */
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pciSlot = ((int)_BE_env.vgaInfo.bus << 8) |
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((int)_BE_env.vgaInfo.device << 3) | (int)_BE_env.vgaInfo.function;
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#else
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/* Fail if no PCI device information has been registered */
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if (!_BE_env.vgaInfo.pciInfo)
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return;
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pciSlot = (u16) (_BE_env.vgaInfo.pciInfo->slot.i >> 8);
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#endif
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switch (M.x86.R_AX) {
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case 0xB101: /* PCI bios present? */
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M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
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M.x86.R_EDX = 0x20494350; /* " ICP" */
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M.x86.R_BX = 0x0210; /* Version 2.10 */
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M.x86.R_CL = 0; /* Max bus number in system */
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CLEAR_FLAG(F_CF);
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break;
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case 0xB102: /* Find PCI device */
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M.x86.R_AH = DEVICE_NOT_FOUND;
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#ifdef __KERNEL__
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if (M.x86.R_DX == _BE_env.vgaInfo.VendorID &&
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M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) {
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#else
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if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
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M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
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M.x86.R_SI == 0) {
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#endif
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M.x86.R_AH = SUCCESSFUL;
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M.x86.R_BX = pciSlot;
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}
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CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
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break;
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case 0xB103: /* Find PCI class code */
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M.x86.R_AH = DEVICE_NOT_FOUND;
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#ifdef __KERNEL__
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pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
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&interface);
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pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
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&subclass);
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pci_read_config_byte(_BE_env.vgaInfo.pcidev,
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PCI_CLASS_DEVICE + 1, &baseclass);
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if (M.x86.R_CL == interface && M.x86.R_CH == subclass
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&& (u8) (M.x86.R_ECX >> 16) == baseclass) {
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#else
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if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
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M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
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(u8) (M.x86.R_ECX >> 16) ==
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_BE_env.vgaInfo.pciInfo->BaseClass) {
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#endif
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M.x86.R_AH = SUCCESSFUL;
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M.x86.R_BX = pciSlot;
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}
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CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
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break;
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case 0xB108: /* Read configuration byte */
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M.x86.R_AH = BAD_REGISTER_NUMBER;
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if (M.x86.R_BX == pciSlot) {
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M.x86.R_AH = SUCCESSFUL;
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#ifdef __KERNEL__
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pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
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&M.x86.R_CL);
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#else
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M.x86.R_CL =
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(u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
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_BE_env.vgaInfo.pciInfo);
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#endif
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}
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CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
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break;
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case 0xB109: /* Read configuration word */
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M.x86.R_AH = BAD_REGISTER_NUMBER;
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if (M.x86.R_BX == pciSlot) {
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M.x86.R_AH = SUCCESSFUL;
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#ifdef __KERNEL__
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pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
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&M.x86.R_CX);
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#else
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M.x86.R_CX =
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(u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
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_BE_env.vgaInfo.pciInfo);
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#endif
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}
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CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
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break;
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case 0xB10A: /* Read configuration dword */
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M.x86.R_AH = BAD_REGISTER_NUMBER;
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if (M.x86.R_BX == pciSlot) {
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M.x86.R_AH = SUCCESSFUL;
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#ifdef __KERNEL__
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pci_read_config_dword(_BE_env.vgaInfo.pcidev,
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M.x86.R_DI, &M.x86.R_ECX);
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#else
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M.x86.R_ECX =
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(u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
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_BE_env.vgaInfo.pciInfo);
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#endif
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}
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CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
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break;
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case 0xB10B: /* Write configuration byte */
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M.x86.R_AH = BAD_REGISTER_NUMBER;
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if (M.x86.R_BX == pciSlot) {
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M.x86.R_AH = SUCCESSFUL;
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#ifdef __KERNEL__
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pci_write_config_byte(_BE_env.vgaInfo.pcidev,
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M.x86.R_DI, M.x86.R_CL);
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#else
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PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
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_BE_env.vgaInfo.pciInfo);
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#endif
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}
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CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
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break;
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case 0xB10C: /* Write configuration word */
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M.x86.R_AH = BAD_REGISTER_NUMBER;
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if (M.x86.R_BX == pciSlot) {
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M.x86.R_AH = SUCCESSFUL;
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#ifdef __KERNEL__
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pci_write_config_word(_BE_env.vgaInfo.pcidev,
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M.x86.R_DI, M.x86.R_CX);
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#else
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PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
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_BE_env.vgaInfo.pciInfo);
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#endif
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}
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CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
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break;
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case 0xB10D: /* Write configuration dword */
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M.x86.R_AH = BAD_REGISTER_NUMBER;
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if (M.x86.R_BX == pciSlot) {
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M.x86.R_AH = SUCCESSFUL;
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#ifdef __KERNEL__
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pci_write_config_dword(_BE_env.vgaInfo.pcidev,
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M.x86.R_DI, M.x86.R_ECX);
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#else
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PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
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_BE_env.vgaInfo.pciInfo);
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#endif
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}
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CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
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break;
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default:
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printf("biosEmu/bios.int1a: unknown function AX=%#04x\n",
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M.x86.R_AX);
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}
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}
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/****************************************************************************
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REMARKS:
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This function initialises the BIOS emulation functions for the specific
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PCI display device. We insulate the real mode BIOS from any other devices
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on the bus, so that it will work correctly thinking that it is the only
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device present on the bus (ie: avoiding any adapters present in from of
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the device we are trying to control).
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****************************************************************************/
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#define BE_constLE_32(v) ((((((v)&0xff00)>>8)|(((v)&0xff)<<8))<<16)|(((((v)&0xff000000)>>8)|(((v)&0x00ff0000)<<8))>>16))
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void _BE_bios_init(u32 * intrTab)
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{
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int i;
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X86EMU_intrFuncs bios_intr_tab[256];
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for (i = 0; i < 256; ++i) {
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intrTab[i] = BE_constLE_32(BIOS_SEG << 16);
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bios_intr_tab[i] = undefined_intr;
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}
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bios_intr_tab[0x10] = int10;
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bios_intr_tab[0x1A] = int1A;
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bios_intr_tab[0x42] = int42;
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bios_intr_tab[0x6D] = int10;
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X86EMU_setupIntrFuncs(bios_intr_tab);
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}
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#endif
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