upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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142 lines
3.0 KiB
142 lines
3.0 KiB
/*
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* Copyright (C) 2011 Ilya Yanok, Emcraft Systems
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*
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* Based on ti/evm/evm.c
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/mem.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/mach-types.h>
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#include <asm/gpio.h>
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#include <asm/omap_gpio.h>
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#include <asm/arch/dss.h>
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#include <asm/arch/clock.h>
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#include "errno.h"
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#include <i2c.h>
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#ifdef CONFIG_USB_EHCI
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#include <usb.h>
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#include <asm/ehci-omap.h>
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#endif
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#include "mcx.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define HOT_WATER_BUTTON 42
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#define LCD_OUTPUT 55
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/* Address of the framebuffer in RAM. */
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#define FB_START_ADDRESS 0x88000000
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#ifdef CONFIG_USB_EHCI
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static struct omap_usbhs_board_data usbhs_bdata = {
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.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
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.port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
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.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
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};
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int ehci_hcd_init(int index, enum usb_init_type init,
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struct ehci_hccr **hccr, struct ehci_hcor **hcor)
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{
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return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
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}
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int ehci_hcd_stop(int index)
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{
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return omap_ehci_hcd_stop();
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}
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#endif
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init(void)
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{
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* boot param addr */
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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gpio_direction_output(LCD_OUTPUT, 0);
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return 0;
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}
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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if (gpio_request(HOT_WATER_BUTTON, "hot-water-button") < 0) {
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puts("Failed to get hot-water-button pin\n");
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return -ENODEV;
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}
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gpio_direction_input(HOT_WATER_BUTTON);
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/*
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* if hot-water-button is pressed
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* change bootcmd
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*/
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if (gpio_get_value(HOT_WATER_BUTTON))
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return 0;
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setenv("bootcmd", "run swupdate");
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return 0;
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}
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#endif
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/*
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* Routine: set_muxconf_regs
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* Description: Setting up the configuration Mux registers specific to the
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* hardware. Many pins need to be moved from protect to primary
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* mode.
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*/
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void set_muxconf_regs(void)
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{
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MUX_MCX();
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}
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#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
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int board_mmc_init(bd_t *bis)
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{
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return omap_mmc_init(0, 0, 0, -1, -1);
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}
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#endif
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#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
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static struct panel_config lcd_cfg = {
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.timing_h = PANEL_TIMING_H(40, 40, 48),
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.timing_v = PANEL_TIMING_V(29, 13, 3),
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.pol_freq = 0x00003000, /* Pol Freq */
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.divisor = 0x0001000E,
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.panel_type = 0x01, /* TFT */
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.data_lines = 0x03, /* 24 Bit RGB */
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.load_mode = 0x02, /* Frame Mode */
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.panel_color = 0,
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.lcd_size = PANEL_LCD_SIZE(800, 480),
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.gfx_format = GFXFORMAT_RGB24_UNPACKED,
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};
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int board_video_init(void)
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{
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struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
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void *fb;
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fb = (void *)FB_START_ADDRESS;
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lcd_cfg.frame_buffer = fb;
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setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
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setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
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omap3_dss_panel_config(&lcd_cfg);
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omap3_dss_enable();
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return 0;
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}
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#endif
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