upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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57 lines
1.1 KiB
57 lines
1.1 KiB
/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CLK_UNIPHIER_H__
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#define __CLK_UNIPHIER_H__
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#include <linux/kernel.h>
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struct uniphier_clk_gate_data {
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int index;
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unsigned int reg;
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u32 mask;
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u32 data;
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};
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struct uniphier_clk_rate_data {
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int index;
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unsigned int reg;
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#define UNIPHIER_CLK_RATE_IS_FIXED UINT_MAX
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u32 mask;
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u32 data;
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unsigned long rate;
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};
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struct uniphier_clk_soc_data {
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struct uniphier_clk_gate_data *gate;
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unsigned int nr_gate;
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struct uniphier_clk_rate_data *rate;
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unsigned int nr_rate;
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};
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#define UNIPHIER_CLK_FIXED_RATE(i, f) \
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{ \
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.index = i, \
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.reg = UNIPHIER_CLK_RATE_IS_FIXED, \
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.rate = f, \
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}
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/**
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* struct uniphier_clk_priv - private data for UniPhier clock driver
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*
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* @base: base address of the clock provider
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* @socdata: SoC specific data
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*/
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struct uniphier_clk_priv {
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void __iomem *base;
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struct uniphier_clk_soc_data *socdata;
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};
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extern const struct clk_ops uniphier_clk_ops;
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int uniphier_clk_probe(struct udevice *dev);
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int uniphier_clk_remove(struct udevice *dev);
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#endif /* __CLK_UNIPHIER_H__ */
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