upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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165 lines
3.9 KiB
165 lines
3.9 KiB
/*
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* (C) Copyright 2000 - 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Hacked for MPC8260 by Murray.Jensen@cmst.csiro.au, 19-Oct-00, with
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* changes based on the file arch/ppc/mbxboot/m8260_tty.c from the
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* Linux/PPC sources (m8260_tty.c had no copyright info in it).
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*/
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/*
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* Minimal serial functions needed to use one of the PSC ports
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* as serial console interface.
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*/
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#include <common.h>
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#include <mpc5xxx.h>
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#if defined(CONFIG_PSC_CONSOLE)
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#if CONFIG_PSC_CONSOLE == 1
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#define PSC_BASE MPC5XXX_PSC1
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#elif CONFIG_PSC_CONSOLE == 2
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#define PSC_BASE MPC5XXX_PSC2
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#elif CONFIG_PSC_CONSOLE == 3
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#define PSC_BASE MPC5XXX_PSC3
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#elif defined(CONFIG_MGT5100)
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#error CONFIG_PSC_CONSOLE must be in 1, 2 or 3
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#elif CONFIG_PSC_CONSOLE == 4
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#define PSC_BASE MPC5XXX_PSC4
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#elif CONFIG_PSC_CONSOLE == 5
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#define PSC_BASE MPC5XXX_PSC5
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#elif CONFIG_PSC_CONSOLE == 6
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#define PSC_BASE MPC5XXX_PSC6
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#else
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#error CONFIG_PSC_CONSOLE must be in 1 ... 6
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#endif
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int serial_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
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unsigned long baseclk;
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int div;
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/* reset PSC */
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psc->command = PSC_SEL_MODE_REG_1;
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/* select clock sources */
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#if defined(CONFIG_MGT5100)
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psc->psc_clock_select = 0xdd00;
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baseclk = (CFG_MPC5XXX_CLKIN + 16) / 32;
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#elif defined(CONFIG_MPC5200)
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psc->psc_clock_select = 0;
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baseclk = (gd->ipb_clk + 16) / 32;
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#endif
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/* switch to UART mode */
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psc->sicr = 0;
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/* configure parity, bit length and so on */
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#if defined(CONFIG_MGT5100)
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psc->mode = PSC_MODE_ERR | PSC_MODE_8_BITS | PSC_MODE_PARNONE;
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#elif defined(CONFIG_MPC5200)
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psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE;
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#endif
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psc->mode = PSC_MODE_ONE_STOP;
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/* set up UART divisor */
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div = (baseclk + (gd->baudrate/2)) / gd->baudrate;
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psc->ctur = (div >> 8) & 0xff;
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psc->ctlr = div & 0xff;
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/* disable all interrupts */
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psc->psc_imr = 0;
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/* reset and enable Rx/Tx */
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psc->command = PSC_RST_RX;
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psc->command = PSC_RST_TX;
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psc->command = PSC_RX_ENABLE | PSC_TX_ENABLE;
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return (0);
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}
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void
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serial_putc(const char c)
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{
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volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
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if (c == '\n')
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serial_putc('\r');
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/* Wait for last character to go. */
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while (!(psc->psc_status & PSC_SR_TXEMP))
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;
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psc->psc_buffer_8 = c;
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}
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void
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serial_puts (const char *s)
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{
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while (*s) {
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serial_putc (*s++);
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}
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}
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int
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serial_getc(void)
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{
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volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
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/* Wait for a character to arrive. */
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while (!(psc->psc_status & PSC_SR_RXRDY))
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;
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return psc->psc_buffer_8;
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}
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int
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serial_tstc(void)
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{
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volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
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return (psc->psc_status & PSC_SR_RXRDY);
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}
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void
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serial_setbrg(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
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unsigned long baseclk, div;
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#if defined(CONFIG_MGT5100)
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baseclk = CFG_MPC5XXX_CLKIN / 32;
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#elif defined(CONFIG_MPC5200)
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baseclk = gd->ipb_clk / 32;
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#endif
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/* set up UART divisor */
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div = baseclk / gd->baudrate;
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psc->ctur = div >> 8;
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psc->ctlr = div & 0xff;
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}
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#endif /* CONFIG_PSC_CONSOLE */
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