upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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75 lines
1.5 KiB
75 lines
1.5 KiB
/*
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* arch/powerpc/kernel/mpc10x_common.c
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*
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* Common routines for the Motorola SPS MPC106, MPC107 and MPC8240 Host bridge,
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* Mem ctlr, EPIC, etc.
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*
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* Author: Mark A. Greer
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* mgreer@mvista.com
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*
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* Copyright 2001 MontaVista Software Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#ifdef CONFIG_PCI
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <pci.h>
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#include <mpc824x.h>
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void pci_mpc824x_init (struct pci_controller *hose)
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{
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hose->first_busno = 0;
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hose->last_busno = 0xff;
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/* System memory space */
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pci_set_region(hose->regions + 0,
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CHRP_PCI_MEMORY_BUS,
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CHRP_PCI_MEMORY_PHYS,
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CHRP_PCI_MEMORY_SIZE,
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PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
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/* PCI memory space */
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pci_set_region(hose->regions + 1,
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CHRP_PCI_MEM_BUS,
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CHRP_PCI_MEM_PHYS,
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CHRP_PCI_MEM_SIZE,
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PCI_REGION_MEM);
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/* ISA/PCI memory space */
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pci_set_region(hose->regions + 2,
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CHRP_ISA_MEM_BUS,
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CHRP_ISA_MEM_PHYS,
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CHRP_ISA_MEM_SIZE,
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PCI_REGION_MEM);
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/* PCI I/O space */
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pci_set_region(hose->regions + 3,
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CHRP_PCI_IO_BUS,
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CHRP_PCI_IO_PHYS,
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CHRP_PCI_IO_SIZE,
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PCI_REGION_IO);
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/* ISA/PCI I/O space */
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pci_set_region(hose->regions + 4,
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CHRP_ISA_IO_BUS,
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CHRP_ISA_IO_PHYS,
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CHRP_ISA_IO_SIZE,
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PCI_REGION_IO);
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hose->region_count = 5;
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pci_setup_indirect(hose,
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CHRP_REG_ADDR,
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CHRP_REG_DATA);
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pci_register_hose(hose);
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hose->last_busno = pci_hose_scan(hose);
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}
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#endif
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