upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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73 lines
1.3 KiB
73 lines
1.3 KiB
/*
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* Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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* Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <ide.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <asm/pci.h>
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#include <netdev.h>
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#include "r7780mp.h"
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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#if defined(CONFIG_R7780MP)
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puts("BOARD: Renesas Solutions R7780MP\n");
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#else
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puts("BOARD: Renesas Solutions R7780RP\n");
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#endif
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return 0;
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}
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int board_init(void)
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{
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/* SCIF Enable */
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writew(0x0, PHCR);
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return 0;
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}
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int dram_init(void)
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{
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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return 0;
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}
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void led_set_state(unsigned short value)
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{
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}
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void ide_set_reset(int idereset)
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{
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/* if reset = 1 IDE reset will be asserted */
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if (idereset) {
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writew(0x432, FPGA_CFCTL);
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#if defined(CONFIG_R7780MP)
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writew(inw(FPGA_CFPOW)|0x01, FPGA_CFPOW);
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#else
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writew(inw(FPGA_CFPOW)|0x02, FPGA_CFPOW);
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#endif
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writew(0x01, FPGA_CFCDINTCLR);
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}
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}
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static struct pci_controller hose;
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void pci_init_board(void)
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{
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pci_sh7780_init(&hose);
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}
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int board_eth_init(bd_t *bis)
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{
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/* return >= 0 if a chip is found, the board's AX88796L is n2k-based */
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return ne2k_register() + pci_eth_init(bis);
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}
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