upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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129 lines
2.9 KiB
129 lines
2.9 KiB
/*
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* Freescale SGMII Riser Card
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*
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* This driver supports the SGMII Riser card found on the
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* "DS" style of development board from Freescale.
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*
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* This software may be used and distributed according to the
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* terms of the GNU Public License, Version 2, incorporated
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* herein by reference.
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*
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* Copyright 2008 Freescale Semiconductor, Inc.
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*
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*/
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#include <config.h>
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#include <common.h>
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#include <net.h>
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#include <linux/libfdt.h>
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#include <tsec.h>
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#include <fdt_support.h>
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void fsl_sgmii_riser_init(struct tsec_info_struct *tsec_info, int num)
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{
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int i;
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for (i = 0; i < num; i++)
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if (tsec_info[i].flags & TSEC_SGMII)
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tsec_info[i].phyaddr += SGMII_RISER_PHY_OFFSET;
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}
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void fsl_sgmii_riser_fdt_fixup(void *fdt)
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{
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struct eth_device *dev;
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int node;
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int mdio_node;
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int i = -1;
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int etsec_num = 0;
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node = fdt_path_offset(fdt, "/aliases");
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if (node < 0)
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return;
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while ((dev = eth_get_dev_by_index(++i)) != NULL) {
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struct tsec_private *priv;
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int phy_node;
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int enet_node;
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uint32_t ph;
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char sgmii_phy[16];
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char enet[16];
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const u32 *phyh;
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const char *model;
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const char *path;
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if (!strstr(dev->name, "eTSEC"))
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continue;
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priv = dev->priv;
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if (!(priv->flags & TSEC_SGMII)) {
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etsec_num++;
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continue;
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}
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mdio_node = fdt_node_offset_by_compatible(fdt, -1,
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"fsl,gianfar-mdio");
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if (mdio_node < 0)
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return;
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sprintf(sgmii_phy, "sgmii-phy@%d", etsec_num);
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phy_node = fdt_subnode_offset(fdt, mdio_node, sgmii_phy);
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if (phy_node > 0) {
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fdt_increase_size(fdt, 32);
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ph = fdt_create_phandle(fdt, phy_node);
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if (!ph)
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continue;
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}
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sprintf(enet, "ethernet%d", etsec_num++);
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path = fdt_getprop(fdt, node, enet, NULL);
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if (!path) {
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debug("No alias for %s\n", enet);
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continue;
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}
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enet_node = fdt_path_offset(fdt, path);
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if (enet_node < 0)
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continue;
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model = fdt_getprop(fdt, enet_node, "model", NULL);
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/*
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* We only want to do this to eTSECs. On some platforms
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* there are more than one type of gianfar-style ethernet
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* controller, and as we are creating an implicit connection
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* between ethernet nodes and eTSEC devices, it is best to
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* make the connection use as much explicit information
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* as exists.
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*/
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if (!strstr(model, "TSEC"))
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continue;
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if (phy_node < 0) {
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/*
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* This part is only for old device tree without
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* sgmii_phy nodes. It's kept just for compatible
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* reason. Soon to be deprecated if all device tree
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* get updated.
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*/
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phyh = fdt_getprop(fdt, enet_node, "phy-handle", NULL);
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if (!phyh)
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continue;
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phy_node = fdt_node_offset_by_phandle(fdt,
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fdt32_to_cpu(*phyh));
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priv = dev->priv;
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if (priv->flags & TSEC_SGMII)
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fdt_setprop_cell(fdt, phy_node, "reg",
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priv->phyaddr);
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} else {
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fdt_setprop(fdt, enet_node, "phy-handle", &ph,
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sizeof(ph));
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fdt_setprop_string(fdt, enet_node,
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"phy-connection-type",
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phy_string_for_interface(
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PHY_INTERFACE_MODE_SGMII));
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}
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}
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}
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