upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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53 lines
1.1 KiB
53 lines
1.1 KiB
/*
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* keystone2: common clock header file
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*
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* (C) Copyright 2012-2014
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* Texas Instruments Incorporated, <www.ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_CLOCK_H
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#define __ASM_ARCH_CLOCK_H
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_SOC_K2HK
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#include <asm/arch/clock-k2hk.h>
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#endif
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#ifdef CONFIG_SOC_K2E
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#include <asm/arch/clock-k2e.h>
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#endif
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#define MAIN_PLL CORE_PLL
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#include <asm/types.h>
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struct keystone_pll_regs {
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u32 reg0;
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u32 reg1;
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};
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/* PLL configuration data */
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struct pll_init_data {
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int pll;
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int pll_m; /* PLL Multiplier */
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int pll_d; /* PLL divider */
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int pll_od; /* PLL output divider */
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};
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extern const struct keystone_pll_regs keystone_pll_regs[];
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extern int dev_speeds[];
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extern int arm_speeds[];
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void init_plls(int num_pll, struct pll_init_data *config);
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void init_pll(const struct pll_init_data *data);
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unsigned long clk_get_rate(unsigned int clk);
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unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
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int clk_set_rate(unsigned int clk, unsigned long hz);
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int get_max_dev_speed(void);
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int get_max_arm_speed(void);
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#endif
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#endif
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