upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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270 lines
6.0 KiB
270 lines
6.0 KiB
/*
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* Driver for SST serial flashes
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*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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* Copyright 2008, Network Appliance Inc.
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* Jason McMullan <mcmullan@netapp.com>
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* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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* Copyright (c) 2008-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <malloc.h>
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#include <spi_flash.h>
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#include "spi_flash_internal.h"
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#define CMD_SST_WREN 0x06 /* Write Enable */
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#define CMD_SST_WRDI 0x04 /* Write Disable */
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#define CMD_SST_RDSR 0x05 /* Read Status Register */
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#define CMD_SST_WRSR 0x01 /* Write Status Register */
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#define CMD_SST_READ 0x03 /* Read Data Bytes */
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#define CMD_SST_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
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#define CMD_SST_BP 0x02 /* Byte Program */
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#define CMD_SST_AAI_WP 0xAD /* Auto Address Increment Word Program */
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#define CMD_SST_SE 0x20 /* Sector Erase */
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#define SST_SR_WIP (1 << 0) /* Write-in-Progress */
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#define SST_SR_WEL (1 << 1) /* Write enable */
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#define SST_SR_BP0 (1 << 2) /* Block Protection 0 */
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#define SST_SR_BP1 (1 << 3) /* Block Protection 1 */
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#define SST_SR_BP2 (1 << 4) /* Block Protection 2 */
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#define SST_SR_AAI (1 << 6) /* Addressing mode */
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#define SST_SR_BPL (1 << 7) /* BP bits lock */
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struct sst_spi_flash_params {
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u8 idcode1;
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u16 nr_sectors;
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const char *name;
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};
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struct sst_spi_flash {
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struct spi_flash flash;
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const struct sst_spi_flash_params *params;
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};
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static inline struct sst_spi_flash *to_sst_spi_flash(struct spi_flash *flash)
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{
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return container_of(flash, struct sst_spi_flash, flash);
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}
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#define SST_SECTOR_SIZE (4 * 1024)
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static const struct sst_spi_flash_params sst_spi_flash_table[] = {
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{
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.idcode1 = 0x8d,
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.nr_sectors = 128,
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.name = "SST25VF040B",
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},{
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.idcode1 = 0x8e,
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.nr_sectors = 256,
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.name = "SST25VF080B",
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},{
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.idcode1 = 0x41,
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.nr_sectors = 512,
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.name = "SST25VF016B",
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},{
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.idcode1 = 0x4a,
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.nr_sectors = 1024,
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.name = "SST25VF032B",
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},{
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.idcode1 = 0x4b,
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.nr_sectors = 2048,
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.name = "SST25VF064C",
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},{
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.idcode1 = 0x01,
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.nr_sectors = 16,
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.name = "SST25WF512",
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},{
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.idcode1 = 0x02,
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.nr_sectors = 32,
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.name = "SST25WF010",
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},{
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.idcode1 = 0x03,
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.nr_sectors = 64,
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.name = "SST25WF020",
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},{
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.idcode1 = 0x04,
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.nr_sectors = 128,
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.name = "SST25WF040",
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},
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};
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static int
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sst_enable_writing(struct spi_flash *flash)
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{
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int ret = spi_flash_cmd(flash->spi, CMD_SST_WREN, NULL, 0);
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if (ret)
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debug("SF: Enabling Write failed\n");
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return ret;
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}
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static int
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sst_disable_writing(struct spi_flash *flash)
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{
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int ret = spi_flash_cmd(flash->spi, CMD_SST_WRDI, NULL, 0);
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if (ret)
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debug("SF: Disabling Write failed\n");
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return ret;
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}
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static int
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sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
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{
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int ret;
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u8 cmd[4] = {
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CMD_SST_BP,
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offset >> 16,
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offset >> 8,
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offset,
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};
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debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
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spi_w8r8(flash->spi, CMD_SST_RDSR), buf, cmd[0], offset);
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ret = sst_enable_writing(flash);
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if (ret)
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return ret;
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ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
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if (ret)
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return ret;
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return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
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}
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static int
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sst_write(struct spi_flash *flash, u32 offset, size_t len, const void *buf)
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{
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size_t actual, cmd_len;
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int ret;
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u8 cmd[4];
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ret = spi_claim_bus(flash->spi);
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if (ret) {
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debug("SF: Unable to claim SPI bus\n");
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return ret;
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}
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/* If the data is not word aligned, write out leading single byte */
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actual = offset % 2;
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if (actual) {
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ret = sst_byte_write(flash, offset, buf);
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if (ret)
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goto done;
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}
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offset += actual;
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ret = sst_enable_writing(flash);
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if (ret)
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goto done;
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cmd_len = 4;
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cmd[0] = CMD_SST_AAI_WP;
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cmd[1] = offset >> 16;
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cmd[2] = offset >> 8;
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cmd[3] = offset;
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for (; actual < len - 1; actual += 2) {
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debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
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spi_w8r8(flash->spi, CMD_SST_RDSR), buf + actual, cmd[0],
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offset);
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ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
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buf + actual, 2);
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if (ret) {
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debug("SF: sst word program failed\n");
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break;
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}
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ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
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if (ret)
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break;
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cmd_len = 1;
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offset += 2;
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}
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if (!ret)
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ret = sst_disable_writing(flash);
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/* If there is a single trailing byte, write it out */
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if (!ret && actual != len)
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ret = sst_byte_write(flash, offset, buf + actual);
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done:
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debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
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ret ? "failure" : "success", len, offset - actual);
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spi_release_bus(flash->spi);
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return ret;
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}
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static int sst_erase(struct spi_flash *flash, u32 offset, size_t len)
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{
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return spi_flash_cmd_erase(flash, CMD_SST_SE, offset, len);
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}
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static int
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sst_unlock(struct spi_flash *flash)
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{
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int ret;
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u8 cmd, status;
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ret = sst_enable_writing(flash);
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if (ret)
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return ret;
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cmd = CMD_SST_WRSR;
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status = 0;
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ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &status, 1);
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if (ret)
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debug("SF: Unable to set status byte\n");
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debug("SF: sst: status = %x\n", spi_w8r8(flash->spi, CMD_SST_RDSR));
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return ret;
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}
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struct spi_flash *
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spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode)
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{
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const struct sst_spi_flash_params *params;
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struct sst_spi_flash *stm;
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size_t i;
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for (i = 0; i < ARRAY_SIZE(sst_spi_flash_table); ++i) {
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params = &sst_spi_flash_table[i];
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if (params->idcode1 == idcode[2])
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break;
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}
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if (i == ARRAY_SIZE(sst_spi_flash_table)) {
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debug("SF: Unsupported SST ID %02x\n", idcode[1]);
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return NULL;
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}
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stm = malloc(sizeof(*stm));
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if (!stm) {
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debug("SF: Failed to allocate memory\n");
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return NULL;
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}
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stm->params = params;
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stm->flash.spi = spi;
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stm->flash.name = params->name;
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stm->flash.write = sst_write;
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stm->flash.erase = sst_erase;
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stm->flash.read = spi_flash_cmd_read_fast;
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stm->flash.sector_size = SST_SECTOR_SIZE;
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stm->flash.size = stm->flash.sector_size * params->nr_sectors;
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/* Flash powers up read-only, so clear BP# bits */
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sst_unlock(&stm->flash);
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return &stm->flash;
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}
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