upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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326 lines
10 KiB
326 lines
10 KiB
#ifndef DMA_H
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#define DMA_H
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/*******************************************************
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*
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* copyright @ Motorola 1999
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*
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*******************************************************/
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#define NUM_DMA_REG 7
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#define DMA_MR_REG 0
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#define DMA_SR_REG 1
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#define DMA_CDAR_REG 2
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#define DMA_SAR_REG 3
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#define DMA_DAR_REG 4
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#define DMA_BCR_REG 5
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#define DMA_NDAR_REG 6
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typedef enum _dmastatus
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{
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DMASUCCESS = 0x1000,
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DMALMERROR,
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DMAPERROR,
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DMACHNBUSY,
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DMAEOSINT,
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DMAEOCAINT,
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DMAINVALID,
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DMANOEVENT,
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} DMAStatus;
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typedef enum _location
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{
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LOCAL = 0, /* local processor accesses on board DMA,
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local processor's eumbbar is required */
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REMOTE = 1, /* PCI master accesses DMA on I/O board,
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I/O processor's pcsrbar is required */
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} LOCATION;
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typedef enum dma_mr_bit
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{
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IRQS = 0x00080000,
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PDE = 0x00040000,
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DAHTS = 0x00030000,
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SAHTS = 0x0000c000,
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DAHE = 0x00002000,
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SAHE = 0x00001000,
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PRC = 0x00000c00,
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EIE = 0x00000080,
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EOTIE = 0x00000040,
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DL = 0x00000008,
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CTM = 0x00000004,
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CC = 0x00000002,
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CS = 0x00000001,
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} DMA_MR_BIT;
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typedef enum dma_sr_bit
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{
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LME = 0x00000080,
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PE = 0x00000010,
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CB = 0x00000004,
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EOSI = 0x00000002,
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EOCAI = 0x00000001,
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} DMA_SR_BIT;
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/* structure for DMA Mode Register */
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typedef struct _dma_mr
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{
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unsigned int reserved0 : 12;
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unsigned int irqs : 1;
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unsigned int pde : 1;
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unsigned int dahts : 2;
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unsigned int sahts : 2;
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unsigned int dahe : 1;
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unsigned int sahe : 1;
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unsigned int prc : 2;
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unsigned int reserved1 : 1;
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unsigned int eie : 1;
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unsigned int eotie : 1;
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unsigned int reserved2 : 3;
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unsigned int dl : 1;
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unsigned int ctm : 1;
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/* if chaining mode is enabled, any time, user can modify the
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* descriptor and does not need to halt the current DMA transaction.
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* Set CC bit, enable DMA to process the modified descriptors
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* Hardware will clear this bit each time, DMA starts.
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*/
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unsigned int cc : 1;
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/* cs bit has dua role, halt the current DMA transaction and
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* (re)start DMA transaction. In chaining mode, if the descriptor
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* needs modification, cs bit shall be used not the cc bit.
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* Hardware will not set/clear this bit each time DMA transaction
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* stops or starts. Software shall do it.
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*
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* cs bit shall not be used to halt chaining DMA transaction for
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* modifying the descriptor. That is the role of CC bit.
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*/
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unsigned int cs : 1;
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} DMA_MR;
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/* structure for DMA Status register */
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typedef struct _dma_sr
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{
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unsigned int reserved0 : 24;
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unsigned int lme : 1;
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unsigned int reserved1 : 2;
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unsigned int pe : 1;
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unsigned int reserved2 : 1;
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unsigned int cb : 1;
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unsigned int eosi : 1;
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unsigned int eocai : 1;
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} DMA_SR;
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/* structure for DMA current descriptor address register */
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typedef struct _dma_cdar
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{
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unsigned int cda : 27;
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unsigned int snen : 1;
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unsigned int eosie : 1;
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unsigned int ctt : 2;
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unsigned int eotd : 1;
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} DMA_CDAR;
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/* structure for DMA byte count register */
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typedef struct _dma_bcr
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{
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unsigned int reserved : 6;
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unsigned int bcr : 26;
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} DMA_BCR;
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/* structure for DMA Next Descriptor Address register */
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typedef struct _dma_ndar
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{
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unsigned int nda : 27;
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unsigned int ndsnen : 1;
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unsigned int ndeosie: 1;
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unsigned int ndctt : 2;
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unsigned int eotd : 1;
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} DMA_NDAR;
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/* structure for DMA current transaction info */
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typedef struct _dma_curr
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{
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unsigned int src_addr;
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unsigned int dest_addr;
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unsigned int byte_cnt;
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} DMA_CURR;
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/************************* Kernel API********************
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* Kernel APIs are used to interface with O.S. kernel.
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* They are the functions required by O.S. kernel to
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* provide I/O service.
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********************************************************/
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/**************DMA Device Control Functions ********/
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/**
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* Note:
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*
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* In all following functions, the host (KAHLUA) processor has a
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* choice of accessing on board local DMA (LOCAL),
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* or DMA on a distributed KAHLUA (REMOTE). In either case,
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* the caller shall pass the configured embedded utility memory
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* block base address relative to the DMA. If LOCAL DMA is used,
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* this parameter shall be EUMBBAR, if REMOTE is used, the
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* parameter shall be the corresponding PCSRBAR.
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**/
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/**************************************************************
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* function: DMA_Get_Stat
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*
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* description: return the content of status register of
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* the given DMA channel
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* if error, return DMAINVALID. Otherwise return
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* DMASUCCESS.
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*
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**************************************************************/
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static DMAStatus DMA_Get_Stat( LOCATION, unsigned int eumbbar, unsigned int channel, DMA_SR * );
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/**************************************************************
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* function: DMA_Get_Mode
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*
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* description: return the content of mode register of the
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* given DMA channel
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* if error, return DMAINVALID. Otherwise return DMASUCCESS.
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*
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**************************************************************/
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static DMAStatus DMA_Get_Mode( LOCATION, unsigned int eumbbar, unsigned int channel, DMA_MR * );
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/**************************************************************
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* function: DMA_Set_Mode
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*
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* description: Set a new mode to a given DMA channel
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* return DMASUCCESS if success, otherwise return DMACHNINVALID
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*
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* note: It is not a good idea of changing the DMA mode during
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* the middle of a transaction.
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**************************************************************/
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static DMAStatus DMA_Set_Mode( LOCATION, unsigned int eumbbar, unsigned int channel, DMA_MR mode );
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/*************************************************************
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* function: DMA_ISR
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*
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* description: DMA interrupt service routine
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* return DMAStatus based on the status
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*
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*************************************************************/
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static DMAStatus DMA_ISR( unsigned int eumbbar,
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unsigned int channel,
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DMAStatus (*lme_func)( unsigned int, unsigned int, DMAStatus ),
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DMAStatus (*pe_func) ( unsigned int, unsigned int, DMAStatus ),
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DMAStatus (*eosi_func)( unsigned int, unsigned int, DMAStatus ),
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DMAStatus (*eocai_func)(unsigned int, unsigned int, DMAStatus ));
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static DMAStatus dma_error_func( unsigned int, unsigned int, DMAStatus );
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/********************* DMA I/O function ********************/
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/************************************************************
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* function: DMA_Start
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*
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* description: start a given DMA channel transaction
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* return DMASUCCESS if success, otherwise return DMACHNINVALID
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*
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* note: this function will clear DMA_MR(CC) first, then
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* set DMA_MR(CC).
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***********************************************************/
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static DMAStatus DMA_Start( LOCATION, unsigned int eumbbar,unsigned int channel );
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/***********************************************************
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* function: DMA_Halt
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*
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* description: halt the current dma transaction on the specified
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* channel.
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* return DMASUCCESS if success, otherwise return DMACHNINVALID
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*
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* note: if the specified DMA channel is idle, nothing happens
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*************************************************************/
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static DMAStatus DMA_Halt( LOCATION, unsigned int eumbbar,unsigned int channel );
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/*************************************************************
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* function: DMA_Chn_Cnt
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*
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* description: set the DMA_MR(CC) bit for a given channel
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* that is in chaining mode.
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* return DMASUCCESS if successfule, otherwise return DMACHNINVALID
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*
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* note: if the given channel is not in chaining mode, nothing
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* happen.
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*
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*************************************************************/
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static DMAStatus DMA_Chn_Cnt( LOCATION, unsigned int eumbbar,unsigned int channel );
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/*********************** App. API ***************************
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* App. API are the APIs Kernel provides for the application
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* level program
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************************************************************/
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/**************************************************************
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* function: DMA_Bld_Curr
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*
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* description: set current src, dest, byte count registers
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* according to the desp for a given channel
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*
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* if the given channel is busy, no change made,
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* return DMACHNBUSY.
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*
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* otherwise return DMASUCCESS.
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*
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* note:
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**************************************************************/
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static DMAStatus DMA_Bld_Curr( LOCATION,
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unsigned int eumbbar,
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unsigned int channel,
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DMA_CURR desp );
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/**************************************************************
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* function: DMA_Poke_Curr
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*
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* description: poke the current src, dest, byte count registers
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* for a given channel.
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*
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* return DMASUCCESS if no error otherwise return DMACHNERROR
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*
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* note: Due to the undeterministic parallelism, in chaining
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* mode, the value returned by this function shall
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* be taken as reference when the query is made rather
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* than the absolute snapshot when the value is returned.
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**************************************************************/
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static DMAStatus DMA_Poke_Curr( LOCATION,
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unsigned int eumbbar,
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unsigned int channel,
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DMA_CURR* desp );
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/**************************************************************
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* function: DMA_Bld_Desp
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*
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* description: set current descriptor address register
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* according to the desp for a given channel
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*
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* if the given channel is busy return DMACHNBUSY
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* and no change made, otherwise return DMASUCCESS.
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*
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* note:
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**************************************************************/
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static DMAStatus DMA_Bld_Desp( LOCATION host,
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unsigned int eumbbar,
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unsigned int channel,
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DMA_CDAR desp );
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/**************************************************************
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* function: DMA_Poke_Desp
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*
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* description: poke the current descriptor address register
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* for a given channel
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*
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* return DMASUCCESS if no error otherwise return
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* DMAINVALID
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*
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* note: Due to the undeterministic parallellism of DMA operation,
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* the value returned by this function shall be taken as
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* the most recently used descriptor when the last time
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* DMA starts a chaining mode operation.
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**************************************************************/
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static DMAStatus DMA_Poke_Desp( LOCATION,
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unsigned int eumbbar,
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unsigned int channel,
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DMA_CDAR *desp );
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#endif
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