upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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190 lines
5.8 KiB
190 lines
5.8 KiB
/*
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* (C) Copyright 2002-2005
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* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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* Gary Jennejohn <garyj@denx.de>
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*
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* Configuation settings for the SAMSUNG board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_ARM920T 1 /* This is an ARM920T core */
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#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
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#define CONFIG_SMDK2400 1 /* on an SAMSUNG SMDK2400 Board */
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/* input clock of PLL */
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#define CONFIG_SYS_CLK_FREQ 12000000 /* SMDK2400 has 12 MHz input clock */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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/*
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* Hardware drivers
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*/
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#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
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#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
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#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
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/*
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* select serial console configuration
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*/
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#define CONFIG_S3C24X0_SERIAL
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#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SAMSUNG */
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#undef CONFIG_HWFLOW /* include RTS/CTS flow control support */
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#undef CONFIG_MODEM_SUPPORT /* enable modem initialization stuff */
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/*
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* The following enables modem debugging stuff. The dbg() and
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* 'char screen[1024]' are used for debug printfs. Unfortunately,
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* it is usable only from BDI
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*/
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#undef CONFIG_MODEM_SUPPORT_DEBUG
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
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/* Use s3c2400's RTC */
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#define CONFIG_RTC_S3C24X0 1
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_SNTP
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#if defined(CONFIG_HWFLOW)
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#define CONFIG_CONFIG_HWFLOW
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#endif
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#if !defined(USE_920T_MMU)
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#undef CONFIG_CMD_CACHE
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#endif
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 134.98.93.36
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#define CONFIG_SERVERIP 134.98.93.22
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
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/* what's this ? it's not used anywhere */
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#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "SMDK2400 # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x0c000000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x0e000000 /* 32 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */
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/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
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/* it to wrap 100 times (total 1562500) to get 1 sec. */
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#define CONFIG_SYS_HZ 1562500
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x0c000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
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#define CONFIG_SYS_FLASH_BASE 0x00000000 /* Flash Bank #1 */
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT (64) /* max number of sectors on one chip */
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#define CONFIG_ENV_IS_IN_FLASH 1
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/* Address and size of Primary Environment Sector */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000)
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#define CONFIG_ENV_SIZE 0x40000
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/* Address and size of Redundant Environment Sector */
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#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
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#endif /* __CONFIG_H */
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