upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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295 lines
8.4 KiB
295 lines
8.4 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* scf0403.c -- support for DataImage SCF0403 LCD
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*
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* Copyright (c) 2013 Adapted from Linux driver:
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* Copyright (c) 2012 Anders Electronics plc. All Rights Reserved.
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* Copyright (c) 2012 CompuLab, Ltd
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* Dmitry Lifshitz <lifshitz@compulab.co.il>
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* Ilya Ledvich <ilya@compulab.co.il>
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* Inspired by Alberto Panizzo <maramaopercheseimorto@gmail.com> &
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* Marek Vasut work in l4f00242t03.c
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*
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* U-Boot port: Nikita Kiryanov <nikita@compulab.co.il>
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*/
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#include <common.h>
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#include <asm/gpio.h>
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#include <spi.h>
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struct scf0403_cmd {
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u16 cmd;
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u16 *params;
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int count;
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};
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struct scf0403_initseq_entry {
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struct scf0403_cmd cmd;
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int delay_ms;
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};
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struct scf0403_priv {
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struct spi_slave *spi;
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unsigned int reset_gpio;
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u32 rddid;
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struct scf0403_initseq_entry *init_seq;
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int seq_size;
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};
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struct scf0403_priv priv;
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#define SCF0403852GGU04_ID 0x000080
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/* SCF0403526GGU20 model commands parameters */
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static u16 extcmd_params_sn20[] = {0xff, 0x98, 0x06};
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static u16 spiinttype_params_sn20[] = {0x60};
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static u16 bc_params_sn20[] = {
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0x01, 0x10, 0x61, 0x74, 0x01, 0x01, 0x1B,
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0x12, 0x71, 0x00, 0x00, 0x00, 0x01, 0x01,
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0x05, 0x00, 0xFF, 0xF2, 0x01, 0x00, 0x40,
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};
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static u16 bd_params_sn20[] = {0x01, 0x23, 0x45, 0x67, 0x01, 0x23, 0x45, 0x67};
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static u16 be_params_sn20[] = {
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0x01, 0x22, 0x22, 0xBA, 0xDC, 0x26, 0x28, 0x22, 0x22,
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};
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static u16 vcom_params_sn20[] = {0x74};
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static u16 vmesur_params_sn20[] = {0x7F, 0x0F, 0x00};
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static u16 powerctl_params_sn20[] = {0x03, 0x0b, 0x00};
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static u16 lvglvolt_params_sn20[] = {0x08};
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static u16 engsetting_params_sn20[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x20};
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static u16 dispfunc_params_sn20[] = {0xa0};
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static u16 dvddvolt_params_sn20[] = {0x74};
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static u16 dispinv_params_sn20[] = {0x00, 0x00, 0x00};
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static u16 panelres_params_sn20[] = {0x82};
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static u16 framerate_params_sn20[] = {0x00, 0x13, 0x13};
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static u16 timing_params_sn20[] = {0x80, 0x05, 0x40, 0x28};
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static u16 powerctl2_params_sn20[] = {0x17, 0x75, 0x79, 0x20};
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static u16 memaccess_params_sn20[] = {0x00};
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static u16 pixfmt_params_sn20[] = {0x66};
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static u16 pgamma_params_sn20[] = {
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0x00, 0x03, 0x0b, 0x0c, 0x0e, 0x08, 0xc5, 0x04,
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0x08, 0x0c, 0x13, 0x11, 0x11, 0x14, 0x0c, 0x10,
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};
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static u16 ngamma_params_sn20[] = {
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0x00, 0x0d, 0x11, 0x0c, 0x0c, 0x04, 0x76, 0x03,
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0x08, 0x0b, 0x16, 0x10, 0x0d, 0x16, 0x0a, 0x00,
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};
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static u16 tearing_params_sn20[] = {0x00};
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/* SCF0403852GGU04 model commands parameters */
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static u16 memaccess_params_sn04[] = {0x08};
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static u16 pixfmt_params_sn04[] = {0x66};
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static u16 modectl_params_sn04[] = {0x01};
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static u16 dispfunc_params_sn04[] = {0x22, 0xe2, 0xFF, 0x04};
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static u16 vcom_params_sn04[] = {0x00, 0x6A};
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static u16 pgamma_params_sn04[] = {
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0x00, 0x07, 0x0d, 0x10, 0x13, 0x19, 0x0f, 0x0c,
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0x05, 0x08, 0x06, 0x13, 0x0f, 0x30, 0x20, 0x1f,
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};
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static u16 ngamma_params_sn04[] = {
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0x1F, 0x20, 0x30, 0x0F, 0x13, 0x06, 0x08, 0x05,
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0x0C, 0x0F, 0x19, 0x13, 0x10, 0x0D, 0x07, 0x00,
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};
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static u16 dispinv_params_sn04[] = {0x02};
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/* Common commands */
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static struct scf0403_cmd scf0403_cmd_slpout = {0x11, NULL, 0};
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static struct scf0403_cmd scf0403_cmd_dison = {0x29, NULL, 0};
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/* SCF0403852GGU04 init sequence */
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static struct scf0403_initseq_entry scf0403_initseq_sn04[] = {
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{{0x36, memaccess_params_sn04, ARRAY_SIZE(memaccess_params_sn04)}, 0},
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{{0x3A, pixfmt_params_sn04, ARRAY_SIZE(pixfmt_params_sn04)}, 0},
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{{0xB6, dispfunc_params_sn04, ARRAY_SIZE(dispfunc_params_sn04)}, 0},
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{{0xC5, vcom_params_sn04, ARRAY_SIZE(vcom_params_sn04)}, 0},
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{{0xE0, pgamma_params_sn04, ARRAY_SIZE(pgamma_params_sn04)}, 0},
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{{0xE1, ngamma_params_sn04, ARRAY_SIZE(ngamma_params_sn04)}, 20},
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{{0xB0, modectl_params_sn04, ARRAY_SIZE(modectl_params_sn04)}, 0},
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{{0xB4, dispinv_params_sn04, ARRAY_SIZE(dispinv_params_sn04)}, 100},
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};
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/* SCF0403526GGU20 init sequence */
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static struct scf0403_initseq_entry scf0403_initseq_sn20[] = {
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{{0xff, extcmd_params_sn20, ARRAY_SIZE(extcmd_params_sn20)}, 0},
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{{0xba, spiinttype_params_sn20, ARRAY_SIZE(spiinttype_params_sn20)}, 0},
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{{0xbc, bc_params_sn20, ARRAY_SIZE(bc_params_sn20)}, 0},
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{{0xbd, bd_params_sn20, ARRAY_SIZE(bd_params_sn20)}, 0},
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{{0xbe, be_params_sn20, ARRAY_SIZE(be_params_sn20)}, 0},
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{{0xc7, vcom_params_sn20, ARRAY_SIZE(vcom_params_sn20)}, 0},
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{{0xed, vmesur_params_sn20, ARRAY_SIZE(vmesur_params_sn20)}, 0},
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{{0xc0, powerctl_params_sn20, ARRAY_SIZE(powerctl_params_sn20)}, 0},
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{{0xfc, lvglvolt_params_sn20, ARRAY_SIZE(lvglvolt_params_sn20)}, 0},
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{{0xb6, dispfunc_params_sn20, ARRAY_SIZE(dispfunc_params_sn20)}, 0},
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{{0xdf, engsetting_params_sn20, ARRAY_SIZE(engsetting_params_sn20)}, 0},
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{{0xf3, dvddvolt_params_sn20, ARRAY_SIZE(dvddvolt_params_sn20)}, 0},
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{{0xb4, dispinv_params_sn20, ARRAY_SIZE(dispinv_params_sn20)}, 0},
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{{0xf7, panelres_params_sn20, ARRAY_SIZE(panelres_params_sn20)}, 0},
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{{0xb1, framerate_params_sn20, ARRAY_SIZE(framerate_params_sn20)}, 0},
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{{0xf2, timing_params_sn20, ARRAY_SIZE(timing_params_sn20)}, 0},
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{{0xc1, powerctl2_params_sn20, ARRAY_SIZE(powerctl2_params_sn20)}, 0},
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{{0x36, memaccess_params_sn20, ARRAY_SIZE(memaccess_params_sn20)}, 0},
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{{0x3a, pixfmt_params_sn20, ARRAY_SIZE(pixfmt_params_sn20)}, 0},
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{{0xe0, pgamma_params_sn20, ARRAY_SIZE(pgamma_params_sn20)}, 0},
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{{0xe1, ngamma_params_sn20, ARRAY_SIZE(ngamma_params_sn20)}, 0},
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{{0x35, tearing_params_sn20, ARRAY_SIZE(tearing_params_sn20)}, 0},
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};
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static void scf0403_gpio_reset(unsigned int gpio)
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{
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if (!gpio_is_valid(gpio))
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return;
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gpio_set_value(gpio, 1);
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mdelay(100);
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gpio_set_value(gpio, 0);
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mdelay(40);
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gpio_set_value(gpio, 1);
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mdelay(100);
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}
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static int scf0403_spi_read_rddid(struct spi_slave *spi, u32 *rddid)
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{
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int error = 0;
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u8 ids_buf = 0x00;
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u16 dummy_buf = 0x00;
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u16 cmd = 0x04;
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error = spi_set_wordlen(spi, 9);
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if (error)
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return error;
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/* Here 9 bits required to transmit a command */
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error = spi_xfer(spi, 9, &cmd, NULL, SPI_XFER_ONCE);
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if (error)
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return error;
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/*
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* Here 8 + 1 bits required to arrange extra clock cycle
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* before the first data bit.
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* According to the datasheet - first parameter is the dummy data.
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*/
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error = spi_xfer(spi, 9, NULL, &dummy_buf, SPI_XFER_ONCE);
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if (error)
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return error;
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error = spi_set_wordlen(spi, 8);
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if (error)
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return error;
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/* Read rest of the data */
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error = spi_xfer(spi, 8, NULL, &ids_buf, SPI_XFER_ONCE);
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if (error)
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return error;
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*rddid = ids_buf;
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return 0;
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}
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static int scf0403_spi_transfer(struct spi_slave *spi, struct scf0403_cmd *cmd)
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{
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int i, error;
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u32 command = cmd->cmd;
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u32 msg;
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error = spi_set_wordlen(spi, 9);
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if (error)
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return error;
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error = spi_xfer(spi, 9, &command, NULL, SPI_XFER_ONCE);
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if (error)
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return error;
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for (i = 0; i < cmd->count; i++) {
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msg = (cmd->params[i] | 0x100);
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error = spi_xfer(spi, 9, &msg, NULL, SPI_XFER_ONCE);
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if (error)
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return error;
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}
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return 0;
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}
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static void scf0403_lcd_init(struct scf0403_priv *priv)
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{
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int i;
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/* reset LCD */
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scf0403_gpio_reset(priv->reset_gpio);
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for (i = 0; i < priv->seq_size; i++) {
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if (scf0403_spi_transfer(priv->spi, &priv->init_seq[i].cmd) < 0)
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puts("SPI transfer failed\n");
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mdelay(priv->init_seq[i].delay_ms);
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}
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}
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static int scf0403_request_reset_gpio(unsigned gpio)
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{
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int err = gpio_request(gpio, "lcd reset");
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if (err)
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return err;
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err = gpio_direction_output(gpio, 0);
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if (err)
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gpio_free(gpio);
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return err;
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}
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int scf0403_init(int reset_gpio)
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{
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int error;
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if (gpio_is_valid(reset_gpio)) {
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error = scf0403_request_reset_gpio(reset_gpio);
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if (error) {
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printf("Failed requesting reset GPIO%d: %d\n",
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reset_gpio, error);
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return error;
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}
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}
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priv.reset_gpio = reset_gpio;
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priv.spi = spi_setup_slave(3, 0, 1000000, SPI_MODE_0);
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error = spi_claim_bus(priv.spi);
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if (error)
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goto bus_claim_fail;
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/* reset LCD */
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scf0403_gpio_reset(reset_gpio);
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error = scf0403_spi_read_rddid(priv.spi, &priv.rddid);
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if (error) {
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puts("IDs read failed\n");
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goto readid_fail;
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}
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if (priv.rddid == SCF0403852GGU04_ID) {
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priv.init_seq = scf0403_initseq_sn04;
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priv.seq_size = ARRAY_SIZE(scf0403_initseq_sn04);
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} else {
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priv.init_seq = scf0403_initseq_sn20;
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priv.seq_size = ARRAY_SIZE(scf0403_initseq_sn20);
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}
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scf0403_lcd_init(&priv);
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/* Start operation */
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scf0403_spi_transfer(priv.spi, &scf0403_cmd_dison);
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mdelay(100);
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scf0403_spi_transfer(priv.spi, &scf0403_cmd_slpout);
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spi_release_bus(priv.spi);
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return 0;
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readid_fail:
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spi_release_bus(priv.spi);
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bus_claim_fail:
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if (gpio_is_valid(priv.reset_gpio))
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gpio_free(priv.reset_gpio);
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return error;
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}
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