upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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62 lines
1.6 KiB
62 lines
1.6 KiB
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <spi_flash.h>
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#include <malloc.h>
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#define ESPI_BOOT_IMAGE_SIZE 0x48
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#define ESPI_BOOT_IMAGE_ADDR 0x50
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#define CONFIG_CFG_DATA_SECTOR 0
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/*
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* The main entry for SPI booting. It's necessary that SDRAM is already
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* configured and available since this code loads the main U-Boot image
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* from SPI into SDRAM and starts it from there.
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*/
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void spi_boot(void)
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{
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void (*uboot)(void) __noreturn;
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u32 offset, code_len;
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unsigned char *buf = NULL;
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struct spi_flash *flash;
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flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
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CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
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if (flash == NULL) {
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puts("\nspi_flash_probe failed");
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hang();
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}
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/*
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* Load U-Boot image from SPI flash into RAM
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*/
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buf = malloc(flash->page_size);
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if (buf == NULL) {
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puts("\nmalloc failed");
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hang();
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}
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memset(buf, 0, flash->page_size);
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spi_flash_read(flash, CONFIG_CFG_DATA_SECTOR,
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flash->page_size, (void *)buf);
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offset = *(u32 *)(buf + ESPI_BOOT_IMAGE_ADDR);
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/* Skip spl code */
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offset += CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS;
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/* Get the code size from offset 0x48 */
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code_len = *(u32 *)(buf + ESPI_BOOT_IMAGE_SIZE);
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/* Skip spl code */
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code_len = code_len - CONFIG_SPL_MAX_SIZE;
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/* copy code to DDR */
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spi_flash_read(flash, offset, code_len,
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(void *)CONFIG_SYS_SPI_FLASH_U_BOOT_DST);
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/*
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* Jump to U-Boot image
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*/
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flush_cache(CONFIG_SYS_SPI_FLASH_U_BOOT_DST, code_len);
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uboot = (void *)CONFIG_SYS_SPI_FLASH_U_BOOT_START;
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(*uboot)();
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}
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