upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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841 lines
19 KiB
841 lines
19 KiB
/*
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* ADI GPIO1 Abstraction Layer
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* Support BF50x, BF51x, BF52x, BF53x and BF561 only.
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*
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* Copyright 2006-2010 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later
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*/
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#include <common.h>
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#include <linux/errno.h>
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#include <asm/gpio.h>
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#include <asm/portmux.h>
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#ifndef CONFIG_ADI_GPIO2
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#if ANOMALY_05000311 || ANOMALY_05000323
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enum {
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AWA_data = SYSCR,
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AWA_data_clear = SYSCR,
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AWA_data_set = SYSCR,
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AWA_toggle = SYSCR,
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AWA_maska = UART_SCR,
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AWA_maska_clear = UART_SCR,
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AWA_maska_set = UART_SCR,
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AWA_maska_toggle = UART_SCR,
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AWA_maskb = UART_GCTL,
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AWA_maskb_clear = UART_GCTL,
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AWA_maskb_set = UART_GCTL,
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AWA_maskb_toggle = UART_GCTL,
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AWA_dir = SPORT1_STAT,
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AWA_polar = SPORT1_STAT,
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AWA_edge = SPORT1_STAT,
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AWA_both = SPORT1_STAT,
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#if ANOMALY_05000311
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AWA_inen = TIMER_ENABLE,
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#elif ANOMALY_05000323
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AWA_inen = DMA1_1_CONFIG,
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#endif
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};
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/* Anomaly Workaround */
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#define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
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#else
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#define AWA_DUMMY_READ(...) do { } while (0)
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#endif
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static struct gpio_port_t * const gpio_array[] = {
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#if defined(BF533_FAMILY)
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(struct gpio_port_t *) FIO_FLAG_D,
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#elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) \
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|| defined(BF538_FAMILY) || defined(CONFIG_BF50x)
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(struct gpio_port_t *) PORTFIO,
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# if !defined(BF538_FAMILY)
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(struct gpio_port_t *) PORTGIO,
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(struct gpio_port_t *) PORTHIO,
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# endif
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#elif defined(BF561_FAMILY)
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(struct gpio_port_t *) FIO0_FLAG_D,
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(struct gpio_port_t *) FIO1_FLAG_D,
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(struct gpio_port_t *) FIO2_FLAG_D,
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#else
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# error no gpio arrays defined
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#endif
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};
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#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) || \
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defined(CONFIG_BF50x)
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static unsigned short * const port_fer[] = {
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(unsigned short *) PORTF_FER,
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(unsigned short *) PORTG_FER,
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(unsigned short *) PORTH_FER,
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};
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# if !defined(BF537_FAMILY)
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static unsigned short * const port_mux[] = {
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(unsigned short *) PORTF_MUX,
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(unsigned short *) PORTG_MUX,
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(unsigned short *) PORTH_MUX,
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};
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static const
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u8 pmux_offset[][16] = {
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# if defined(CONFIG_BF52x)
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{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
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{ 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
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{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
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# elif defined(CONFIG_BF51x)
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{ 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
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{ 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
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{ 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
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# endif
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};
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# endif
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#elif defined(BF538_FAMILY)
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static unsigned short * const port_fer[] = {
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(unsigned short *) PORTCIO_FER,
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(unsigned short *) PORTDIO_FER,
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(unsigned short *) PORTEIO_FER,
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};
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#endif
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#ifdef CONFIG_BFIN_GPIO_TRACK
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#define RESOURCE_LABEL_SIZE 16
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static struct str_ident {
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char name[RESOURCE_LABEL_SIZE];
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} str_ident[MAX_RESOURCES];
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static void gpio_error(unsigned gpio)
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{
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printf("bfin-gpio: GPIO %d wasn't requested!\n", gpio);
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}
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static void set_label(unsigned short ident, const char *label)
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{
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if (label) {
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strncpy(str_ident[ident].name, label,
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RESOURCE_LABEL_SIZE);
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str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
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}
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}
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static char *get_label(unsigned short ident)
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{
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return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
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}
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static int cmp_label(unsigned short ident, const char *label)
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{
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if (label == NULL)
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printf("bfin-gpio: please provide none-null label\n");
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if (label)
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return strcmp(str_ident[ident].name, label);
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else
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return -EINVAL;
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}
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#define map_entry(m, i) reserved_##m##_map[gpio_bank(i)]
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#define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i))
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#define reserve(m, i) (map_entry(m, i) |= gpio_bit(i))
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#define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i))
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#define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c]
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#else
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#define is_reserved(m, i, e) (!(e))
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#define reserve(m, i)
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#define unreserve(m, i)
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#define DECLARE_RESERVED_MAP(m, c)
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#define gpio_error(gpio)
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#define set_label(...)
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#define get_label(...) ""
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#define cmp_label(...) 1
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#endif
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DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
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DECLARE_RESERVED_MAP(peri, gpio_bank(MAX_RESOURCES));
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inline int check_gpio(unsigned gpio)
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{
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if (gpio >= MAX_BLACKFIN_GPIOS)
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return -EINVAL;
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return 0;
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}
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static void port_setup(unsigned gpio, unsigned short usage)
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{
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#if defined(BF538_FAMILY)
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/*
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* BF538/9 Port C,D and E are special.
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* Inverted PORT_FER polarity on CDE and no PORF_FER on F
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* Regular PORT F GPIOs are handled here, CDE are exclusively
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* managed by GPIOLIB
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*/
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if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
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return;
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gpio -= MAX_BLACKFIN_GPIOS;
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if (usage == GPIO_USAGE)
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*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
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else
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*port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
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SSYNC();
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return;
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#endif
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if (check_gpio(gpio))
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return;
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#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) || \
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defined(CONFIG_BF50x)
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if (usage == GPIO_USAGE)
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*port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
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else
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*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
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SSYNC();
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#endif
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}
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#ifdef BF537_FAMILY
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static struct {
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unsigned short res;
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unsigned short offset;
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} port_mux_lut[] = {
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{.res = P_PPI0_D13, .offset = 11},
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{.res = P_PPI0_D14, .offset = 11},
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{.res = P_PPI0_D15, .offset = 11},
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{.res = P_SPORT1_TFS, .offset = 11},
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{.res = P_SPORT1_TSCLK, .offset = 11},
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{.res = P_SPORT1_DTPRI, .offset = 11},
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{.res = P_PPI0_D10, .offset = 10},
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{.res = P_PPI0_D11, .offset = 10},
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{.res = P_PPI0_D12, .offset = 10},
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{.res = P_SPORT1_RSCLK, .offset = 10},
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{.res = P_SPORT1_RFS, .offset = 10},
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{.res = P_SPORT1_DRPRI, .offset = 10},
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{.res = P_PPI0_D8, .offset = 9},
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{.res = P_PPI0_D9, .offset = 9},
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{.res = P_SPORT1_DRSEC, .offset = 9},
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{.res = P_SPORT1_DTSEC, .offset = 9},
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{.res = P_TMR2, .offset = 8},
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{.res = P_PPI0_FS3, .offset = 8},
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{.res = P_TMR3, .offset = 7},
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{.res = P_SPI0_SSEL4, .offset = 7},
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{.res = P_TMR4, .offset = 6},
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{.res = P_SPI0_SSEL5, .offset = 6},
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{.res = P_TMR5, .offset = 5},
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{.res = P_SPI0_SSEL6, .offset = 5},
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{.res = P_UART1_RX, .offset = 4},
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{.res = P_UART1_TX, .offset = 4},
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{.res = P_TMR6, .offset = 4},
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{.res = P_TMR7, .offset = 4},
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{.res = P_UART0_RX, .offset = 3},
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{.res = P_UART0_TX, .offset = 3},
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{.res = P_DMAR0, .offset = 3},
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{.res = P_DMAR1, .offset = 3},
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{.res = P_SPORT0_DTSEC, .offset = 1},
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{.res = P_SPORT0_DRSEC, .offset = 1},
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{.res = P_CAN0_RX, .offset = 1},
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{.res = P_CAN0_TX, .offset = 1},
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{.res = P_SPI0_SSEL7, .offset = 1},
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{.res = P_SPORT0_TFS, .offset = 0},
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{.res = P_SPORT0_DTPRI, .offset = 0},
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{.res = P_SPI0_SSEL2, .offset = 0},
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{.res = P_SPI0_SSEL3, .offset = 0},
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};
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static void portmux_setup(unsigned short per)
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{
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u16 y, offset, muxreg, mask;
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u16 function = P_FUNCT2MUX(per);
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for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
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if (port_mux_lut[y].res == per) {
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/* SET PORTMUX REG */
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offset = port_mux_lut[y].offset;
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muxreg = bfin_read_PORT_MUX();
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if (offset == 1)
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mask = 3;
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else
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mask = 1;
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muxreg &= ~(mask << offset);
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muxreg |= ((function & mask) << offset);
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bfin_write_PORT_MUX(muxreg);
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}
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}
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}
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#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
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inline void portmux_setup(unsigned short per)
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{
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u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
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u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
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pmux = *port_mux[gpio_bank(ident)];
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pmux &= ~(3 << offset);
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pmux |= (function & 3) << offset;
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*port_mux[gpio_bank(ident)] = pmux;
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SSYNC();
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}
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#else
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# define portmux_setup(...) do { } while (0)
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#endif
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/***********************************************************
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*
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* FUNCTIONS: Blackfin General Purpose Ports Access Functions
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*
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* INPUTS/OUTPUTS:
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* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
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*
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*
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* DESCRIPTION: These functions abstract direct register access
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* to Blackfin processor General Purpose
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* Ports Regsiters
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*
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* CAUTION: These functions do not belong to the GPIO Driver API
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*************************************************************
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* MODIFICATION HISTORY :
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**************************************************************/
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/* Set a specific bit */
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#define SET_GPIO(name) \
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void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
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{ \
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unsigned long flags; \
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local_irq_save(flags); \
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if (arg) \
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gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
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else \
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gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
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AWA_DUMMY_READ(name); \
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local_irq_restore(flags); \
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}
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SET_GPIO(dir) /* set_gpio_dir() */
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SET_GPIO(inen) /* set_gpio_inen() */
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SET_GPIO(polar) /* set_gpio_polar() */
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SET_GPIO(edge) /* set_gpio_edge() */
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SET_GPIO(both) /* set_gpio_both() */
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#define SET_GPIO_SC(name) \
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void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
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{ \
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unsigned long flags; \
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if (ANOMALY_05000311 || ANOMALY_05000323) \
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local_irq_save(flags); \
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if (arg) \
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gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
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else \
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gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
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if (ANOMALY_05000311 || ANOMALY_05000323) { \
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AWA_DUMMY_READ(name); \
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local_irq_restore(flags); \
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} \
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}
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SET_GPIO_SC(maska)
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SET_GPIO_SC(maskb)
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SET_GPIO_SC(data)
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void set_gpio_toggle(unsigned gpio)
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{
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unsigned long flags;
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if (ANOMALY_05000311 || ANOMALY_05000323)
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local_irq_save(flags);
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gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
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if (ANOMALY_05000311 || ANOMALY_05000323) {
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AWA_DUMMY_READ(toggle);
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local_irq_restore(flags);
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}
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}
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/* Set current PORT date (16-bit word) */
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#define SET_GPIO_P(name) \
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void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
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{ \
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unsigned long flags; \
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if (ANOMALY_05000311 || ANOMALY_05000323) \
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local_irq_save(flags); \
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gpio_array[gpio_bank(gpio)]->name = arg; \
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if (ANOMALY_05000311 || ANOMALY_05000323) { \
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AWA_DUMMY_READ(name); \
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local_irq_restore(flags); \
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} \
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}
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SET_GPIO_P(data)
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SET_GPIO_P(dir)
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SET_GPIO_P(inen)
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SET_GPIO_P(polar)
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SET_GPIO_P(edge)
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SET_GPIO_P(both)
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SET_GPIO_P(maska)
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SET_GPIO_P(maskb)
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/* Get a specific bit */
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#define GET_GPIO(name) \
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unsigned short get_gpio_ ## name(unsigned gpio) \
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{ \
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unsigned long flags; \
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unsigned short ret; \
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if (ANOMALY_05000311 || ANOMALY_05000323) \
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local_irq_save(flags); \
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ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
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if (ANOMALY_05000311 || ANOMALY_05000323) { \
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AWA_DUMMY_READ(name); \
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local_irq_restore(flags); \
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} \
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return ret; \
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}
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GET_GPIO(data)
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GET_GPIO(dir)
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GET_GPIO(inen)
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GET_GPIO(polar)
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GET_GPIO(edge)
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GET_GPIO(both)
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GET_GPIO(maska)
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GET_GPIO(maskb)
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/* Get current PORT date (16-bit word) */
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#define GET_GPIO_P(name) \
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unsigned short get_gpiop_ ## name(unsigned gpio) \
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{ \
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unsigned long flags; \
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unsigned short ret; \
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if (ANOMALY_05000311 || ANOMALY_05000323) \
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local_irq_save(flags); \
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ret = (gpio_array[gpio_bank(gpio)]->name); \
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if (ANOMALY_05000311 || ANOMALY_05000323) { \
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AWA_DUMMY_READ(name); \
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local_irq_restore(flags); \
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} \
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return ret; \
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}
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GET_GPIO_P(data)
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GET_GPIO_P(dir)
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GET_GPIO_P(inen)
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GET_GPIO_P(polar)
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GET_GPIO_P(edge)
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GET_GPIO_P(both)
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GET_GPIO_P(maska)
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GET_GPIO_P(maskb)
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/***********************************************************
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*
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* FUNCTIONS: Blackfin Peripheral Resource Allocation
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* and PortMux Setup
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*
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* INPUTS/OUTPUTS:
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* per Peripheral Identifier
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* label String
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*
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* DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
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*
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* CAUTION:
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*************************************************************
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* MODIFICATION HISTORY :
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**************************************************************/
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int peripheral_request(unsigned short per, const char *label)
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{
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unsigned short ident = P_IDENT(per);
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/*
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* Don't cares are pins with only one dedicated function
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*/
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if (per & P_DONTCARE)
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return 0;
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if (!(per & P_DEFINED))
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return -ENODEV;
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BUG_ON(ident >= MAX_RESOURCES);
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/* If a pin can be muxed as either GPIO or peripheral, make
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* sure it is not already a GPIO pin when we request it.
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*/
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if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) {
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printf("%s: Peripheral %d is already reserved as GPIO by %s !\n",
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__func__, ident, get_label(ident));
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return -EBUSY;
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}
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if (unlikely(is_reserved(peri, ident, 1))) {
|
|
|
|
/*
|
|
* Pin functions like AMC address strobes my
|
|
* be requested and used by several drivers
|
|
*/
|
|
|
|
if (!(per & P_MAYSHARE)) {
|
|
/*
|
|
* Allow that the identical pin function can
|
|
* be requested from the same driver twice
|
|
*/
|
|
|
|
if (cmp_label(ident, label) == 0)
|
|
goto anyway;
|
|
|
|
printf("%s: Peripheral %d function %d is already reserved by %s !\n",
|
|
__func__, ident, P_FUNCT2MUX(per), get_label(ident));
|
|
return -EBUSY;
|
|
}
|
|
}
|
|
|
|
anyway:
|
|
reserve(peri, ident);
|
|
|
|
portmux_setup(per);
|
|
port_setup(ident, PERIPHERAL_USAGE);
|
|
|
|
set_label(ident, label);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int peripheral_request_list(const unsigned short per[], const char *label)
|
|
{
|
|
u16 cnt;
|
|
int ret;
|
|
|
|
for (cnt = 0; per[cnt] != 0; cnt++) {
|
|
|
|
ret = peripheral_request(per[cnt], label);
|
|
|
|
if (ret < 0) {
|
|
for ( ; cnt > 0; cnt--)
|
|
peripheral_free(per[cnt - 1]);
|
|
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void peripheral_free(unsigned short per)
|
|
{
|
|
unsigned short ident = P_IDENT(per);
|
|
|
|
if (per & P_DONTCARE)
|
|
return;
|
|
|
|
if (!(per & P_DEFINED))
|
|
return;
|
|
|
|
if (unlikely(!is_reserved(peri, ident, 0)))
|
|
return;
|
|
|
|
if (!(per & P_MAYSHARE))
|
|
port_setup(ident, GPIO_USAGE);
|
|
|
|
unreserve(peri, ident);
|
|
|
|
set_label(ident, "free");
|
|
}
|
|
|
|
void peripheral_free_list(const unsigned short per[])
|
|
{
|
|
u16 cnt;
|
|
for (cnt = 0; per[cnt] != 0; cnt++)
|
|
peripheral_free(per[cnt]);
|
|
}
|
|
|
|
/***********************************************************
|
|
*
|
|
* FUNCTIONS: Blackfin GPIO Driver
|
|
*
|
|
* INPUTS/OUTPUTS:
|
|
* gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
|
|
* label String
|
|
*
|
|
* DESCRIPTION: Blackfin GPIO Driver API
|
|
*
|
|
* CAUTION:
|
|
*************************************************************
|
|
* MODIFICATION HISTORY :
|
|
**************************************************************/
|
|
|
|
int gpio_request(unsigned gpio, const char *label)
|
|
{
|
|
if (check_gpio(gpio) < 0)
|
|
return -EINVAL;
|
|
|
|
/*
|
|
* Allow that the identical GPIO can
|
|
* be requested from the same driver twice
|
|
* Do nothing and return -
|
|
*/
|
|
|
|
if (cmp_label(gpio, label) == 0)
|
|
return 0;
|
|
|
|
if (unlikely(is_reserved(gpio, gpio, 1))) {
|
|
printf("bfin-gpio: GPIO %d is already reserved by %s !\n",
|
|
gpio, get_label(gpio));
|
|
return -EBUSY;
|
|
}
|
|
if (unlikely(is_reserved(peri, gpio, 1))) {
|
|
printf("bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
|
|
gpio, get_label(gpio));
|
|
return -EBUSY;
|
|
}
|
|
else { /* Reset POLAR setting when acquiring a gpio for the first time */
|
|
set_gpio_polar(gpio, 0);
|
|
}
|
|
|
|
reserve(gpio, gpio);
|
|
set_label(gpio, label);
|
|
|
|
port_setup(gpio, GPIO_USAGE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int gpio_free(unsigned gpio)
|
|
{
|
|
if (check_gpio(gpio) < 0)
|
|
return -1;
|
|
|
|
if (unlikely(!is_reserved(gpio, gpio, 0))) {
|
|
gpio_error(gpio);
|
|
return -1;
|
|
}
|
|
|
|
unreserve(gpio, gpio);
|
|
|
|
set_label(gpio, "free");
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef ADI_SPECIAL_GPIO_BANKS
|
|
DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES));
|
|
|
|
int special_gpio_request(unsigned gpio, const char *label)
|
|
{
|
|
/*
|
|
* Allow that the identical GPIO can
|
|
* be requested from the same driver twice
|
|
* Do nothing and return -
|
|
*/
|
|
|
|
if (cmp_label(gpio, label) == 0)
|
|
return 0;
|
|
|
|
if (unlikely(is_reserved(special_gpio, gpio, 1))) {
|
|
printf("bfin-gpio: GPIO %d is already reserved by %s !\n",
|
|
gpio, get_label(gpio));
|
|
return -EBUSY;
|
|
}
|
|
if (unlikely(is_reserved(peri, gpio, 1))) {
|
|
printf("bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
|
|
gpio, get_label(gpio));
|
|
|
|
return -EBUSY;
|
|
}
|
|
|
|
reserve(special_gpio, gpio);
|
|
reserve(peri, gpio);
|
|
|
|
set_label(gpio, label);
|
|
port_setup(gpio, GPIO_USAGE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void special_gpio_free(unsigned gpio)
|
|
{
|
|
if (unlikely(!is_reserved(special_gpio, gpio, 0))) {
|
|
gpio_error(gpio);
|
|
return;
|
|
}
|
|
|
|
unreserve(special_gpio, gpio);
|
|
unreserve(peri, gpio);
|
|
set_label(gpio, "free");
|
|
}
|
|
#endif
|
|
|
|
static inline void __gpio_direction_input(unsigned gpio)
|
|
{
|
|
gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
|
|
gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
|
|
}
|
|
|
|
int gpio_direction_input(unsigned gpio)
|
|
{
|
|
unsigned long flags;
|
|
|
|
if (!is_reserved(gpio, gpio, 0)) {
|
|
gpio_error(gpio);
|
|
return -EINVAL;
|
|
}
|
|
|
|
local_irq_save(flags);
|
|
__gpio_direction_input(gpio);
|
|
AWA_DUMMY_READ(inen);
|
|
local_irq_restore(flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int gpio_set_value(unsigned gpio, int arg)
|
|
{
|
|
if (arg)
|
|
gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
|
|
else
|
|
gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int gpio_direction_output(unsigned gpio, int value)
|
|
{
|
|
unsigned long flags;
|
|
|
|
if (!is_reserved(gpio, gpio, 0)) {
|
|
gpio_error(gpio);
|
|
return -EINVAL;
|
|
}
|
|
|
|
local_irq_save(flags);
|
|
|
|
gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
|
|
gpio_set_value(gpio, value);
|
|
gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
|
|
|
|
AWA_DUMMY_READ(dir);
|
|
local_irq_restore(flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int gpio_get_value(unsigned gpio)
|
|
{
|
|
unsigned long flags;
|
|
|
|
if (unlikely(get_gpio_edge(gpio))) {
|
|
int ret;
|
|
local_irq_save(flags);
|
|
set_gpio_edge(gpio, 0);
|
|
ret = get_gpio_data(gpio);
|
|
set_gpio_edge(gpio, 1);
|
|
local_irq_restore(flags);
|
|
return ret;
|
|
} else
|
|
return get_gpio_data(gpio);
|
|
}
|
|
|
|
/* If we are booting from SPI and our board lacks a strong enough pull up,
|
|
* the core can reset and execute the bootrom faster than the resistor can
|
|
* pull the signal logically high. To work around this (common) error in
|
|
* board design, we explicitly set the pin back to GPIO mode, force /CS
|
|
* high, and wait for the electrons to do their thing.
|
|
*
|
|
* This function only makes sense to be called from reset code, but it
|
|
* lives here as we need to force all the GPIO states w/out going through
|
|
* BUG() checks and such.
|
|
*/
|
|
void bfin_reset_boot_spi_cs(unsigned short pin)
|
|
{
|
|
unsigned short gpio = P_IDENT(pin);
|
|
port_setup(gpio, GPIO_USAGE);
|
|
gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
|
|
AWA_DUMMY_READ(data_set);
|
|
udelay(1);
|
|
}
|
|
|
|
int name_to_gpio(const char *name)
|
|
{
|
|
int port_base;
|
|
|
|
if (tolower(*name) == 'p') {
|
|
++name;
|
|
|
|
switch (tolower(*name)) {
|
|
#ifdef GPIO_PA0
|
|
case 'a': port_base = GPIO_PA0; break;
|
|
#endif
|
|
#ifdef GPIO_PB0
|
|
case 'b': port_base = GPIO_PB0; break;
|
|
#endif
|
|
#ifdef GPIO_PC0
|
|
case 'c': port_base = GPIO_PC0; break;
|
|
#endif
|
|
#ifdef GPIO_PD0
|
|
case 'd': port_base = GPIO_PD0; break;
|
|
#endif
|
|
#ifdef GPIO_PE0
|
|
case 'e': port_base = GPIO_PE0; break;
|
|
#endif
|
|
#ifdef GPIO_PF0
|
|
case 'f': port_base = GPIO_PF0; break;
|
|
#endif
|
|
#ifdef GPIO_PG0
|
|
case 'g': port_base = GPIO_PG0; break;
|
|
#endif
|
|
#ifdef GPIO_PH0
|
|
case 'h': port_base = GPIO_PH0; break;
|
|
#endif
|
|
#ifdef GPIO_PI0
|
|
case 'i': port_base = GPIO_PI0; break;
|
|
#endif
|
|
#ifdef GPIO_PJ
|
|
case 'j': port_base = GPIO_PJ0; break;
|
|
#endif
|
|
default: return -1;
|
|
}
|
|
|
|
++name;
|
|
} else
|
|
port_base = 0;
|
|
|
|
return port_base + simple_strtoul(name, NULL, 10);
|
|
}
|
|
|
|
void gpio_labels(void)
|
|
{
|
|
int c, gpio;
|
|
|
|
for (c = 0; c < MAX_RESOURCES; c++) {
|
|
gpio = is_reserved(gpio, c, 1);
|
|
if (!check_gpio(c) && gpio)
|
|
printf("GPIO_%d:\t%s\tGPIO %s\n", c,
|
|
get_label(c),
|
|
get_gpio_dir(c) ? "OUTPUT" : "INPUT");
|
|
else if (is_reserved(peri, c, 1))
|
|
printf("GPIO_%d:\t%s\tPeripheral\n", c, get_label(c));
|
|
else
|
|
continue;
|
|
}
|
|
}
|
|
#else
|
|
struct gpio_port_t * const gpio_array[] = {
|
|
(struct gpio_port_t *)PORTA_FER,
|
|
(struct gpio_port_t *)PORTB_FER,
|
|
(struct gpio_port_t *)PORTC_FER,
|
|
(struct gpio_port_t *)PORTD_FER,
|
|
(struct gpio_port_t *)PORTE_FER,
|
|
(struct gpio_port_t *)PORTF_FER,
|
|
(struct gpio_port_t *)PORTG_FER,
|
|
#if defined(CONFIG_BF54x)
|
|
(struct gpio_port_t *)PORTH_FER,
|
|
(struct gpio_port_t *)PORTI_FER,
|
|
(struct gpio_port_t *)PORTJ_FER,
|
|
#endif
|
|
};
|
|
#endif
|
|
|