upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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89 lines
2.3 KiB
89 lines
2.3 KiB
/*
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* Copyright (C) 2012 Vikram Narayananan
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* <vikram186@gmail.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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inline int gpio_is_valid(unsigned gpio)
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{
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return (gpio < BCM2835_GPIO_COUNT);
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}
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int gpio_request(unsigned gpio, const char *label)
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{
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return !gpio_is_valid(gpio);
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}
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int gpio_free(unsigned gpio)
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{
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return 0;
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}
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int gpio_direction_input(unsigned gpio)
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{
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struct bcm2835_gpio_regs *reg =
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(struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
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unsigned val;
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val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
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val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio));
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val |= (BCM2835_GPIO_INPUT << BCM2835_GPIO_FSEL_SHIFT(gpio));
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writel(val, ®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
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return 0;
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}
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int gpio_direction_output(unsigned gpio, int value)
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{
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struct bcm2835_gpio_regs *reg =
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(struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
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unsigned val;
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gpio_set_value(gpio, value);
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val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
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val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio));
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val |= (BCM2835_GPIO_OUTPUT << BCM2835_GPIO_FSEL_SHIFT(gpio));
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writel(val, ®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
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return 0;
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}
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int gpio_get_value(unsigned gpio)
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{
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struct bcm2835_gpio_regs *reg =
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(struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
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unsigned val;
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val = readl(®->gplev[BCM2835_GPIO_COMMON_BANK(gpio)]);
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return (val >> BCM2835_GPIO_COMMON_SHIFT(gpio)) & 0x1;
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}
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int gpio_set_value(unsigned gpio, int value)
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{
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struct bcm2835_gpio_regs *reg =
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(struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
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u32 *output_reg = value ? reg->gpset : reg->gpclr;
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writel(1 << BCM2835_GPIO_COMMON_SHIFT(gpio),
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&output_reg[BCM2835_GPIO_COMMON_BANK(gpio)]);
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return 0;
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}
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