upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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62 lines
1.3 KiB
62 lines
1.3 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Qualcomm APQ8016 pinctrl
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*
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* (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
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*
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*/
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#include "pinctrl-snapdragon.h"
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#include <common.h>
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#define MAX_PIN_NAME_LEN 32
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static char pin_name[MAX_PIN_NAME_LEN];
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static const char * const msm_pinctrl_pins[] = {
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"SDC1_CLK",
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"SDC1_CMD",
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"SDC1_DATA",
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"SDC2_CLK",
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"SDC2_CMD",
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"SDC2_DATA",
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"QDSD_CLK",
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"QDSD_CMD",
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"QDSD_DATA0",
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"QDSD_DATA1",
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"QDSD_DATA2",
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"QDSD_DATA3",
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};
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static const struct pinctrl_function msm_pinctrl_functions[] = {
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{"blsp1_uart", 2},
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};
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static const char *apq8016_get_function_name(struct udevice *dev,
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unsigned int selector)
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{
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return msm_pinctrl_functions[selector].name;
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}
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static const char *apq8016_get_pin_name(struct udevice *dev,
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unsigned int selector)
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{
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if (selector < 130) {
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snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
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return pin_name;
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} else {
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return msm_pinctrl_pins[selector - 130];
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}
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}
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static unsigned int apq8016_get_function_mux(unsigned int selector)
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{
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return msm_pinctrl_functions[selector].val;
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}
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struct msm_pinctrl_data apq8016_data = {
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.pin_count = 140,
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.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
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.get_function_name = apq8016_get_function_name,
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.get_function_mux = apq8016_get_function_mux,
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.get_pin_name = apq8016_get_pin_name,
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};
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