upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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149 lines
3.1 KiB
149 lines
3.1 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2012-2015 Panasonic Corporation
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* Copyright (C) 2015-2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/printk.h>
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#include "init.h"
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#include "micro-support-card.h"
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#include "soc-info.h"
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#ifdef CONFIG_ARCH_UNIPHIER_LD20
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static void uniphier_ld20_misc_init(void)
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{
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/* ES1 errata: increase VDD09 supply to suppress VBO noise */
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if (uniphier_get_soc_revision() == 1) {
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writel(0x00000003, 0x6184e004);
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writel(0x00000100, 0x6184e040);
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writel(0x0000b500, 0x6184e024);
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writel(0x00000001, 0x6184e000);
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}
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}
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#endif
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struct uniphier_initdata {
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unsigned int soc_id;
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void (*sbc_init)(void);
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void (*pll_init)(void);
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void (*clk_init)(void);
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void (*misc_init)(void);
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};
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static const struct uniphier_initdata uniphier_initdata[] = {
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#if defined(CONFIG_ARCH_UNIPHIER_LD4)
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{
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.soc_id = UNIPHIER_LD4_ID,
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.sbc_init = uniphier_ld4_sbc_init,
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.pll_init = uniphier_ld4_pll_init,
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.clk_init = uniphier_ld4_clk_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
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{
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.soc_id = UNIPHIER_PRO4_ID,
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.sbc_init = uniphier_sbc_init_savepin,
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.pll_init = uniphier_pro4_pll_init,
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.clk_init = uniphier_pro4_clk_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
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{
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.soc_id = UNIPHIER_SLD8_ID,
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.sbc_init = uniphier_ld4_sbc_init,
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.pll_init = uniphier_ld4_pll_init,
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.clk_init = uniphier_ld4_clk_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
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{
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.soc_id = UNIPHIER_PRO5_ID,
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.sbc_init = uniphier_sbc_init_savepin,
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.clk_init = uniphier_pro5_clk_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
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{
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.soc_id = UNIPHIER_PXS2_ID,
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.sbc_init = uniphier_pxs2_sbc_init,
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.clk_init = uniphier_pxs2_clk_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
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{
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.soc_id = UNIPHIER_LD6B_ID,
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.sbc_init = uniphier_pxs2_sbc_init,
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.clk_init = uniphier_pxs2_clk_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD11)
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{
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.soc_id = UNIPHIER_LD11_ID,
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.sbc_init = uniphier_ld11_sbc_init,
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.pll_init = uniphier_ld11_pll_init,
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.clk_init = uniphier_ld11_clk_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD20)
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{
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.soc_id = UNIPHIER_LD20_ID,
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.sbc_init = uniphier_ld11_sbc_init,
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.pll_init = uniphier_ld20_pll_init,
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.clk_init = uniphier_ld20_clk_init,
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.misc_init = uniphier_ld20_misc_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PXS3)
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{
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.soc_id = UNIPHIER_PXS3_ID,
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.sbc_init = uniphier_pxs2_sbc_init,
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.pll_init = uniphier_pxs3_pll_init,
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.clk_init = uniphier_pxs3_clk_init,
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},
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#endif
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};
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UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata)
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int board_init(void)
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{
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const struct uniphier_initdata *initdata;
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led_puts("U0");
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initdata = uniphier_get_initdata();
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if (!initdata) {
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pr_err("unsupported SoC\n");
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return -EINVAL;
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}
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initdata->sbc_init();
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support_card_init();
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led_puts("U0");
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if (initdata->pll_init)
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initdata->pll_init();
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led_puts("U1");
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if (initdata->clk_init)
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initdata->clk_init();
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led_puts("U2");
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if (initdata->misc_init)
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initdata->misc_init();
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led_puts("U3");
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support_card_late_init();
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led_puts("Uboo");
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return 0;
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}
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