upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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91 lines
2.5 KiB
91 lines
2.5 KiB
/*
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* (C) Copyright 2008 Texas Insturments
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* CPU specific code
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/system.h>
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#include <asm/cache.h>
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#include <asm/armv7.h>
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#include <linux/compiler.h>
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void __naked save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
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{
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/*
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* Stack pointer is not yet initialized
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* Don't save anything to stack even if compiled with -O0
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*/
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asm("bx lr");
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}
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void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
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__attribute__((weak, alias("save_boot_params_default")));
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int cleanup_before_linux(void)
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{
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/*
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* this function is called just before we call linux
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* it prepares the processor for linux
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*
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* we turn off caches etc ...
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*/
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#ifndef CONFIG_SPL_BUILD
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disable_interrupts();
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#endif
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/*
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* Turn off I-cache and invalidate it
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*/
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icache_disable();
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invalidate_icache_all();
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/*
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* turn off D-cache
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* dcache_disable() in turn flushes the d-cache and disables MMU
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*/
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dcache_disable();
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v7_outer_cache_disable();
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/*
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* After D-cache is flushed and before it is disabled there may
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* be some new valid entries brought into the cache. We are sure
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* that these lines are not dirty and will not affect our execution.
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* (because unwinding the call-stack and setting a bit in CP15 SCTRL
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* is all we did during this. We have not pushed anything on to the
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* stack. Neither have we affected any static data)
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* So just invalidate the entire d-cache again to avoid coherency
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* problems for kernel
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*/
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invalidate_dcache_all();
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return 0;
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}
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