upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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183 lines
5.4 KiB
183 lines
5.4 KiB
/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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* Copyright (C) 2009 coresystems GmbH
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <asm/arch-coreboot/ipchecksum.h>
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#include <asm/arch-coreboot/sysinfo.h>
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#include <asm/arch-coreboot/tables.h>
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/*
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* Some of this is x86 specific, and the rest of it is generic. Right now,
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* since we only support x86, we'll avoid trying to make lots of infrastructure
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* we don't need. If in the future, we want to use coreboot on some other
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* architecture, then take out the generic parsing code and move it elsewhere.
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*/
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/* === Parsing code === */
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/* This is the generic parsing code. */
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static void cb_parse_memory(unsigned char *ptr, struct sysinfo_t *info)
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{
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struct cb_memory *mem = (struct cb_memory *)ptr;
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int count = MEM_RANGE_COUNT(mem);
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int i;
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if (count > SYSINFO_MAX_MEM_RANGES)
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count = SYSINFO_MAX_MEM_RANGES;
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info->n_memranges = 0;
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for (i = 0; i < count; i++) {
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struct cb_memory_range *range =
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(struct cb_memory_range *)MEM_RANGE_PTR(mem, i);
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info->memrange[info->n_memranges].base =
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UNPACK_CB64(range->start);
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info->memrange[info->n_memranges].size =
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UNPACK_CB64(range->size);
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info->memrange[info->n_memranges].type = range->type;
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info->n_memranges++;
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}
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}
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static void cb_parse_serial(unsigned char *ptr, struct sysinfo_t *info)
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{
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struct cb_serial *ser = (struct cb_serial *)ptr;
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if (ser->type != CB_SERIAL_TYPE_IO_MAPPED)
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return;
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info->ser_ioport = ser->baseaddr;
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}
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static void cb_parse_optiontable(unsigned char *ptr, struct sysinfo_t *info)
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{
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info->option_table = (struct cb_cmos_option_table *)ptr;
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}
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static void cb_parse_checksum(unsigned char *ptr, struct sysinfo_t *info)
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{
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struct cb_cmos_checksum *cmos_cksum = (struct cb_cmos_checksum *)ptr;
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info->cmos_range_start = cmos_cksum->range_start;
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info->cmos_range_end = cmos_cksum->range_end;
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info->cmos_checksum_location = cmos_cksum->location;
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}
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static void cb_parse_framebuffer(unsigned char *ptr, struct sysinfo_t *info)
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{
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info->framebuffer = (struct cb_framebuffer *)ptr;
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}
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static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
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{
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struct cb_header *header;
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unsigned char *ptr = (unsigned char *)addr;
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int i;
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for (i = 0; i < len; i += 16, ptr += 16) {
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header = (struct cb_header *)ptr;
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if (!strncmp((const char *)header->signature, "LBIO", 4))
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break;
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}
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/* We walked the entire space and didn't find anything. */
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if (i >= len)
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return -1;
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if (!header->table_bytes)
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return 0;
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/* Make sure the checksums match. */
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if (ipchksum((u16 *) header, sizeof(*header)) != 0)
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return -1;
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if (ipchksum((u16 *) (ptr + sizeof(*header)),
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header->table_bytes) != header->table_checksum)
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return -1;
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/* Now, walk the tables. */
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ptr += header->header_bytes;
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for (i = 0; i < header->table_entries; i++) {
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struct cb_record *rec = (struct cb_record *)ptr;
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/* We only care about a few tags here (maybe more later). */
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switch (rec->tag) {
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case CB_TAG_FORWARD:
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return cb_parse_header(
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(void *)(unsigned long)
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((struct cb_forward *)rec)->forward,
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len, info);
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continue;
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case CB_TAG_MEMORY:
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cb_parse_memory(ptr, info);
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break;
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case CB_TAG_SERIAL:
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cb_parse_serial(ptr, info);
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break;
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case CB_TAG_CMOS_OPTION_TABLE:
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cb_parse_optiontable(ptr, info);
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break;
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case CB_TAG_OPTION_CHECKSUM:
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cb_parse_checksum(ptr, info);
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break;
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/*
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* FIXME we should warn on serial if coreboot set up a
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* framebuffer buf the payload does not know about it.
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*/
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case CB_TAG_FRAMEBUFFER:
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cb_parse_framebuffer(ptr, info);
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break;
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}
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ptr += rec->size;
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}
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return 1;
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}
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/* == Architecture specific == */
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/* This is the x86 specific stuff. */
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/* Assume no translation or that memory is identity mapped. */
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static void *phys_to_virt(unsigned long virt)
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{
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return (void *)(uintptr_t)virt;
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}
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int get_coreboot_info(struct sysinfo_t *info)
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{
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int ret = cb_parse_header(phys_to_virt(0x00000000), 0x1000, info);
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if (ret != 1)
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ret = cb_parse_header(phys_to_virt(0x000f0000), 0x1000, info);
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return (ret == 1) ? 0 : -1;
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}
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