upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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144 lines
3.1 KiB
144 lines
3.1 KiB
/*
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* (C) Copyright 2010
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* Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <miiphy.h>
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#include <asm/io.h>
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struct io_bb_pinset {
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int mdio;
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int mdc;
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};
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static int io_bb_mii_init(struct bb_miiphy_bus *bus)
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{
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return 0;
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}
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static int io_bb_mdio_active(struct bb_miiphy_bus *bus)
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{
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struct io_bb_pinset *pins = bus->priv;
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out_be32((void *)GPIO0_TCR,
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in_be32((void *)GPIO0_TCR) | pins->mdio);
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return 0;
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}
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static int io_bb_mdio_tristate(struct bb_miiphy_bus *bus)
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{
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struct io_bb_pinset *pins = bus->priv;
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out_be32((void *)GPIO0_TCR,
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in_be32((void *)GPIO0_TCR) & ~pins->mdio);
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return 0;
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}
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static int io_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
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{
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struct io_bb_pinset *pins = bus->priv;
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if (v)
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out_be32((void *)GPIO0_OR,
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in_be32((void *)GPIO0_OR) | pins->mdio);
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else
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out_be32((void *)GPIO0_OR,
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in_be32((void *)GPIO0_OR) & ~pins->mdio);
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return 0;
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}
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static int io_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
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{
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struct io_bb_pinset *pins = bus->priv;
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*v = ((in_be32((void *)GPIO0_IR) & pins->mdio) != 0);
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return 0;
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}
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static int io_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
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{
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struct io_bb_pinset *pins = bus->priv;
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if (v)
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out_be32((void *)GPIO0_OR,
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in_be32((void *)GPIO0_OR) | pins->mdc);
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else
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out_be32((void *)GPIO0_OR,
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in_be32((void *)GPIO0_OR) & ~pins->mdc);
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return 0;
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}
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static int io_bb_delay(struct bb_miiphy_bus *bus)
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{
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udelay(1);
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return 0;
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}
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struct io_bb_pinset io_bb_pinsets[] = {
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{
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.mdio = CONFIG_SYS_MDIO_PIN,
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.mdc = CONFIG_SYS_MDC_PIN,
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},
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#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME
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{
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.mdio = CONFIG_SYS_MDIO1_PIN,
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.mdc = CONFIG_SYS_MDC1_PIN,
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},
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#endif
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};
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struct bb_miiphy_bus bb_miiphy_buses[] = {
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{
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.name = CONFIG_SYS_GBIT_MII_BUSNAME,
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.init = io_bb_mii_init,
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.mdio_active = io_bb_mdio_active,
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.mdio_tristate = io_bb_mdio_tristate,
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.set_mdio = io_bb_set_mdio,
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.get_mdio = io_bb_get_mdio,
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.set_mdc = io_bb_set_mdc,
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.delay = io_bb_delay,
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.priv = &io_bb_pinsets[0],
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},
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#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME
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{
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.name = CONFIG_SYS_GBIT_MII1_BUSNAME,
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.init = io_bb_mii_init,
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.mdio_active = io_bb_mdio_active,
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.mdio_tristate = io_bb_mdio_tristate,
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.set_mdio = io_bb_set_mdio,
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.get_mdio = io_bb_get_mdio,
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.set_mdc = io_bb_set_mdc,
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.delay = io_bb_delay,
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.priv = &io_bb_pinsets[1],
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},
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#endif
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};
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int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
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sizeof(bb_miiphy_buses[0]);
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