upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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32 lines
695 B
32 lines
695 B
/*
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* From Coreboot
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <asm/pci.h>
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#include <asm/arch/pch.h>
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void bd82x6x_usb_xhci_init(pci_dev_t dev)
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{
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u32 reg32;
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debug("XHCI: Setting up controller.. ");
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/* lock overcurrent map */
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reg32 = x86_pci_read_config32(dev, 0x44);
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reg32 |= 1;
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x86_pci_write_config32(dev, 0x44, reg32);
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/* Enable clock gating */
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reg32 = x86_pci_read_config32(dev, 0x40);
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reg32 &= ~((1 << 20) | (1 << 21));
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reg32 |= (1 << 19) | (1 << 18) | (1 << 17);
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reg32 |= (1 << 10) | (1 << 9) | (1 << 8);
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reg32 |= (1 << 31); /* lock */
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x86_pci_write_config32(dev, 0x40, reg32);
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debug("done.\n");
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}
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