upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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59 lines
1001 B
59 lines
1001 B
/*
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* (C) Copyright 2012-2014
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* Texas Instruments Incorporated, <www.ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <div64.h>
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#include <bootstage.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_SYS_HZ_CLOCK
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static inline u32 read_cntfrq(void)
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{
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u32 frq;
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asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq));
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return frq;
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}
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#endif
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int timer_init(void)
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{
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gd->arch.tbl = 0;
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gd->arch.tbu = 0;
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#ifdef CONFIG_SYS_HZ_CLOCK
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gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK;
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#else
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gd->arch.timer_rate_hz = read_cntfrq();
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#endif
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return 0;
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}
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unsigned long long get_ticks(void)
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{
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ulong nowl, nowu;
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asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (nowl), "=r" (nowu));
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gd->arch.tbl = nowl;
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gd->arch.tbu = nowu;
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return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
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}
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ulong timer_get_boot_us(void)
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{
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return lldiv(get_ticks(), gd->arch.timer_rate_hz / 1000000);
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}
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ulong get_tbclk(void)
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{
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return gd->arch.timer_rate_hz;
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}
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