upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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191 lines
3.9 KiB
191 lines
3.9 KiB
/*
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* Samsung's Exynos4 SoC common device tree source
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*
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* Copyright (c) 2014 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include "skeleton.dtsi"
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/ {
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aliases {
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i2c0 = &i2c_0;
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i2c1 = &i2c_1;
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i2c2 = &i2c_2;
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i2c3 = &i2c_3;
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i2c4 = &i2c_4;
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i2c5 = &i2c_5;
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i2c6 = &i2c_6;
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i2c7 = &i2c_7;
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};
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combiner: interrupt-controller@10440000 {
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compatible = "samsung,exynos4210-combiner";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0x10440000 0x1000>;
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};
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gic: interrupt-controller@10490000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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cpu-offset = <0x4000>;
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reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
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};
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serial_0: serial@13800000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13800000 0x3c>;
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id = <0>;
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};
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serail_1: serial@13810000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13810000 0x3c>;
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id = <1>;
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};
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serial_2: serial@13820000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13820000 0x3c>;
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id = <2>;
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};
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serial_3: serial@13830000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13830000 0x3c>;
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id = <3>;
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};
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serial_4: serial@13840000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13840000 0x3c>;
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id = <4>;
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};
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i2c_0: i2c@13860000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13860000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 56 0>;
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};
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i2c_1: i2c@13870000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13870000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <1 57 0>;
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};
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i2c_2: i2c@13880000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13880000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <2 58 0>;
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};
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i2c_3: i2c@13890000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13890000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <3 59 0>;
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};
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i2c_4: i2c@138a0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138a0000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <4 60 0>;
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};
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i2c_5: i2c@138b0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138b0000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <5 61 0>;
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};
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i2c_6: i2c@138c0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138c0000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <6 62 0>;
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};
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i2c_7: i2c@138d0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138d0000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <7 63 0>;
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};
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sdhci0: sdhci@12510000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos4412-sdhci";
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reg = <0x12510000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 75 0>;
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status = "disabled";
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};
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sdhci1: sdhci@12520000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos4412-sdhci";
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reg = <0x12520000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 76 0>;
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status = "disabled";
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};
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sdhci2: sdhci@12530000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos4412-sdhci";
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reg = <0x12530000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 77 0>;
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status = "disabled";
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};
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sdhci3: sdhci@12540000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos4412-sdhci";
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reg = <0x12540000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 78 0>;
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status = "disabled";
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};
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mshc_0: dwmmc@12550000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos4412-dw-mshc";
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reg = <0x12550000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 131 0>;
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status = "disabled";
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};
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};
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