upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
40 lines
870 B
40 lines
870 B
/*
|
|
* Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board
|
|
*
|
|
* Copyright (C) 2016 Renesas Electronics Corp.
|
|
* Copyright (C) 2016 Cogent Embedded, Inc.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "r8a7796.dtsi"
|
|
#include "ulcb.dtsi"
|
|
|
|
/ {
|
|
model = "Renesas M3ULCB board based on r8a7796";
|
|
compatible = "renesas,m3ulcb", "renesas,r8a7796";
|
|
|
|
memory@48000000 {
|
|
device_type = "memory";
|
|
/* first 128MB is reserved for secure area. */
|
|
reg = <0x0 0x48000000 0x0 0x38000000>;
|
|
};
|
|
|
|
memory@600000000 {
|
|
device_type = "memory";
|
|
reg = <0x6 0x00000000 0x0 0x40000000>;
|
|
};
|
|
};
|
|
|
|
&du {
|
|
clocks = <&cpg CPG_MOD 724>,
|
|
<&cpg CPG_MOD 723>,
|
|
<&cpg CPG_MOD 722>,
|
|
<&cpg CPG_MOD 727>,
|
|
<&versaclock5 1>,
|
|
<&versaclock5 3>,
|
|
<&versaclock5 2>;
|
|
clock-names = "du.0", "du.1", "du.2", "lvds.0",
|
|
"dclkin.0", "dclkin.1", "dclkin.2";
|
|
};
|
|
|