upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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228 lines
3.6 KiB
228 lines
3.6 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* dts file for Xilinx ZynqMP zc1751-xm016-dc2
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*
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* (C) Copyright 2015 - 2018, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*/
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/dts-v1/;
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#include "zynqmp.dtsi"
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#include "zynqmp-clk-ccf.dtsi"
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/ {
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model = "ZynqMP zc1751-xm016-dc2 RevA";
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compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
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aliases {
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can0 = &can0;
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can1 = &can1;
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ethernet0 = &gem2;
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gpio0 = &gpio;
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i2c0 = &i2c0;
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rtc0 = &rtc;
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serial0 = &uart0;
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serial1 = &uart1;
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spi0 = &spi0;
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spi1 = &spi1;
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usb0 = &usb1;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
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};
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};
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&can0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&fpd_dma_chan1 {
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status = "okay";
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};
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&fpd_dma_chan2 {
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status = "okay";
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};
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&fpd_dma_chan3 {
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status = "okay";
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};
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&fpd_dma_chan4 {
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status = "okay";
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};
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&fpd_dma_chan5 {
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status = "okay";
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};
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&fpd_dma_chan6 {
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status = "okay";
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};
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&fpd_dma_chan7 {
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status = "okay";
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};
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&fpd_dma_chan8 {
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status = "okay";
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};
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&gem2 {
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status = "okay";
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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phy0: phy@5 {
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reg = <5>;
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ti,rx-internal-delay = <0x8>;
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ti,tx-internal-delay = <0xa>;
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ti,fifo-depth = <0x1>;
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};
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};
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&gpio {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <400000>;
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tca6416_u26: gpio@20 {
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compatible = "ti,tca6416";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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/* IRQ not connected */
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};
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rtc@68 {
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compatible = "dallas,ds1339";
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reg = <0x68>;
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};
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};
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&nand0 {
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status = "okay";
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arasan,has-mdma;
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num-cs = <2>;
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partition@0 { /* for testing purpose */
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label = "nand-fsbl-uboot";
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reg = <0x0 0x0 0x400000>;
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};
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partition@1 { /* for testing purpose */
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label = "nand-linux";
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reg = <0x0 0x400000 0x1400000>;
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};
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partition@2 { /* for testing purpose */
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label = "nand-device-tree";
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reg = <0x0 0x1800000 0x400000>;
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};
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partition@3 { /* for testing purpose */
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label = "nand-rootfs";
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reg = <0x0 0x1C00000 0x1400000>;
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};
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partition@4 { /* for testing purpose */
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label = "nand-bitstream";
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reg = <0x0 0x3000000 0x400000>;
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};
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partition@5 { /* for testing purpose */
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label = "nand-misc";
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reg = <0x0 0x3400000 0xFCC00000>;
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};
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partition@6 { /* for testing purpose */
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label = "nand1-fsbl-uboot";
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reg = <0x1 0x0 0x400000>;
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};
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partition@7 { /* for testing purpose */
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label = "nand1-linux";
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reg = <0x1 0x400000 0x1400000>;
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};
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partition@8 { /* for testing purpose */
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label = "nand1-device-tree";
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reg = <0x1 0x1800000 0x400000>;
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};
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partition@9 { /* for testing purpose */
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label = "nand1-rootfs";
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reg = <0x1 0x1C00000 0x1400000>;
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};
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partition@10 { /* for testing purpose */
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label = "nand1-bitstream";
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reg = <0x1 0x3000000 0x400000>;
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};
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partition@11 { /* for testing purpose */
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label = "nand1-misc";
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reg = <0x1 0x3400000 0xFCC00000>;
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};
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};
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&rtc {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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num-cs = <1>;
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spi0_flash0: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "sst,sst25wf080", "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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reg = <0>;
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partition@0 {
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label = "data";
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reg = <0x0 0x100000>;
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};
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};
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};
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&spi1 {
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status = "okay";
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num-cs = <1>;
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spi1_flash0: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at45db041e", "atmel,at45", "atmel,dataflash";
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spi-max-frequency = <20000000>;
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reg = <0>;
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partition@0 {
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label = "data";
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reg = <0x0 0x84000>;
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};
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};
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};
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/* ULPI SMSC USB3320 */
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&usb1 {
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status = "okay";
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};
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&dwc3_1 {
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status = "okay";
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dr_mode = "host";
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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