upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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48 lines
1.1 KiB
48 lines
1.1 KiB
/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/post.h>
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#include <asm/arch/qemu.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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u32 ram;
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outb(HIGH_RAM_ADDR, CMOS_ADDR_PORT);
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ram = ((u32)inb(CMOS_DATA_PORT)) << 14;
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outb(LOW_RAM_ADDR, CMOS_ADDR_PORT);
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ram |= ((u32)inb(CMOS_DATA_PORT)) << 6;
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ram += 16 * 1024;
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gd->ram_size = ram * 1024;
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post_code(POST_DRAM);
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = 0;
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gd->bd->bi_dram[0].size = gd->ram_size;
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return 0;
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}
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/*
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* This function looks for the highest region of memory lower than 4GB which
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* has enough space for U-Boot where U-Boot is aligned on a page boundary.
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* It overrides the default implementation found elsewhere which simply
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* picks the end of ram, wherever that may be. The location of the stack,
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* the relocation address, and how far U-Boot is moved by relocation are
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* set in the global data structure.
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*/
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ulong board_get_usable_ram_top(ulong total_size)
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{
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return gd->ram_size;
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}
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