upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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79 lines
1.7 KiB
79 lines
1.7 KiB
/*
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* Copyright (C) 2015 - 2016 Xilinx, Inc.
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* Written by Michal Simek
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <i2c.h>
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#include <asm/gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct pca954x_priv {
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u32 addr; /* I2C mux address */
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u32 width; /* I2C mux width - number of busses */
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};
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static int pca954x_deselect(struct udevice *mux, struct udevice *bus,
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uint channel)
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{
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struct pca954x_priv *priv = dev_get_priv(mux);
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uchar byte = 0;
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return dm_i2c_write(mux, priv->addr, &byte, 1);
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}
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static int pca954x_select(struct udevice *mux, struct udevice *bus,
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uint channel)
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{
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struct pca954x_priv *priv = dev_get_priv(mux);
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uchar byte = 1 << channel;
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return dm_i2c_write(mux, priv->addr, &byte, 1);
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}
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static const struct i2c_mux_ops pca954x_ops = {
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.select = pca954x_select,
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.deselect = pca954x_deselect,
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};
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static const struct udevice_id pca954x_ids[] = {
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{ .compatible = "nxp,pca9548", .data = (ulong)8 },
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{ .compatible = "nxp,pca9544", .data = (ulong)4 },
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{ }
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};
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static int pca954x_ofdata_to_platdata(struct udevice *dev)
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{
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struct pca954x_priv *priv = dev_get_priv(dev);
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priv->addr = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg", 0);
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if (!priv->addr) {
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debug("MUX not found\n");
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return -ENODEV;
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}
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priv->width = dev_get_driver_data(dev);
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if (!priv->width) {
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debug("No I2C MUX width specified\n");
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return -EINVAL;
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}
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debug("Device %s at 0x%x with width %d\n",
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dev->name, priv->addr, priv->width);
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return 0;
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}
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U_BOOT_DRIVER(pca954x) = {
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.name = "pca954x",
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.id = UCLASS_I2C_MUX,
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.of_match = pca954x_ids,
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.ops = &pca954x_ops,
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.ofdata_to_platdata = pca954x_ofdata_to_platdata,
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.priv_auto_alloc_size = sizeof(struct pca954x_priv),
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};
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