upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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153 lines
4.5 KiB
153 lines
4.5 KiB
/*
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* Configuation settings for the sh7752evb board
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __SH7752EVB_H
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#define __SH7752EVB_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4A 1
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#define CONFIG_SH_32BIT 1
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#define CONFIG_CPU_SH7752 1
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#define CONFIG_SH7752EVB 1
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#define CONFIG_SYS_TEXT_BASE 0x5ff80000
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#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7752evb/u-boot.lds"
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_DFL
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#define CONFIG_CMD_SDRAM
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_RUN
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_MD5SUM
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#define CONFIG_MD5
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#define CONFIG_CMD_LOADS
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_EXT2
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#define CONFIG_DOS_PARTITION
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#define CONFIG_MAC_PARTITION
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
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#define CONFIG_VERSION_VARIABLE
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#undef CONFIG_SHOW_BOOT_PROGRESS
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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/* MEMORY */
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#define SH7752EVB_SDRAM_BASE (0x40000000)
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#define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_PROMPT "=> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE 512
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#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
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/* SCIF */
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#define CONFIG_SCIF_CONSOLE 1
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#define CONFIG_CONS_SCIF2 1
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#undef CONFIG_SYS_CONSOLE_INFO_QUIET
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#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
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#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
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#define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
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480 * 1024 * 1024)
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#undef CONFIG_SYS_ALT_MEMTEST
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#undef CONFIG_SYS_MEMTEST_SCRATCH
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE
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#define CONFIG_SYS_SDRAM_BASE (SH7752EVB_SDRAM_BASE)
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#define CONFIG_SYS_SDRAM_SIZE (SH7752EVB_SDRAM_SIZE)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
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128 * 1024 * 1024)
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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/* FLASH */
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#define CONFIG_SYS_NO_FLASH
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/* Ether */
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#define CONFIG_SH_ETHER 1
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 18
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#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
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#define CONFIG_SH_ETHER_USE_GETHER 1
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#define CONFIG_PHYLIB
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
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#define CONFIG_PHY_VITESSE
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#define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000
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#define SH7752EVB_SPI_SECTOR_SIZE (64 * 1024)
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#define SH7752EVB_ETHERNET_MAC_BASE SH7752EVB_ETHERNET_MAC_BASE_SPI
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#define SH7752EVB_ETHERNET_MAC_SIZE 17
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#define SH7752EVB_ETHERNET_NUM_CH 2
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#define CONFIG_BOARD_LATE_INIT
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/* SPI */
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#define CONFIG_SH_SPI 1
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#define CONFIG_SH_SPI_BASE 0xfe002000
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_STMICRO 1
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#define CONFIG_SPI_FLASH_MACRONIX 1
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/* MMCIF */
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#define CONFIG_MMC 1
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#define CONFIG_GENERIC_MMC 1
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#define CONFIG_SH_MMCIF 1
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#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
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#define CONFIG_SH_MMCIF_CLK 48000000
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/* ENV setting */
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#define CONFIG_ENV_IS_EMBEDDED
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_ADDR (0x00080000)
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
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#define CONFIG_ENV_OVERWRITE 1
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#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netboot=bootp; bootm\0"
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 48000000
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#define CONFIG_SYS_TMU_CLK_DIV 4
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#define CONFIG_SYS_HZ 1000
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#endif /* __SH7752EVB_H */
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