upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
205 lines
5.4 KiB
205 lines
5.4 KiB
/*
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* (C) Copyright 2003
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* Texas Instruments <www.ti.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002-2004
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* (C) Copyright 2004
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* Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#define TIMER_LOAD_VAL 0xffffffff
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/* macro to read the 32 bit timer */
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#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
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static ulong timestamp;
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static ulong lastdec;
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#define TIMER_ENABLE (1 << 7)
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#define TIMER_MODE_MSK (1 << 6)
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#define TIMER_MODE_FR (0 << 6)
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#define TIMER_MODE_PD (1 << 6)
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#define TIMER_INT_EN (1 << 5)
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#define TIMER_PRS_MSK (3 << 2)
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#define TIMER_PRS_8S (1 << 3)
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#define TIMER_SIZE_MSK (1 << 2)
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#define TIMER_ONE_SHT (1 << 0)
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int timer_init (void)
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{
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ulong tmr_ctrl_val;
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/* 1st disable the Timer */
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tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
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tmr_ctrl_val &= ~TIMER_ENABLE;
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*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
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/*
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* The Timer Control Register has one Undefined/Shouldn't Use Bit
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* So we should do read/modify/write Operation
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*/
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/*
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* Timer Mode : Free Running
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* Interrupt : Disabled
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* Prescale : 8 Stage, Clk/256
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* Tmr Siz : 16 Bit Counter
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* Tmr in Wrapping Mode
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*/
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tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
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tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT );
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tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S);
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*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
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/* init the timestamp and lastdec value */
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reset_timer_masked();
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return 0;
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}
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/*
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* timer without interrupts
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*/
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void reset_timer (void)
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{
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reset_timer_masked ();
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}
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ulong get_timer (ulong base)
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{
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return get_timer_masked () - base;
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}
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void set_timer (ulong t)
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{
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timestamp = t;
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}
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/* delay x useconds AND perserve advance timstamp value */
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void udelay (unsigned long usec)
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{
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ulong tmo, tmp;
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if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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}else{ /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000*1000);
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}
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tmp = get_timer (0); /* get current timestamp */
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if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */
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reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
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else
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tmo += tmp; /* else, set advancing stamp wake up time */
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while (get_timer_masked () < tmo)/* loop till event */
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/*NOP*/;
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}
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void reset_timer_masked (void)
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{
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/* reset time */
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lastdec = READ_TIMER; /* capure current decrementer value time */
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timestamp = 0; /* start "advancing" time stamp from 0 */
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}
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ulong get_timer_masked (void)
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{
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ulong now = READ_TIMER; /* current tick value */
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if (lastdec >= now) { /* normal mode (non roll) */
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/* normal mode */
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timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
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} else { /* we have overflow of the count down timer */
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/* nts = ts + ld + (TLV - now)
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* ts=old stamp, ld=time that passed before passing through -1
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* (TLV-now) amount of time after passing though -1
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* nts = new "advancing time stamp"...it could also roll and cause problems.
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*/
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timestamp += lastdec + TIMER_LOAD_VAL - now;
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}
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lastdec = now;
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return timestamp;
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}
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/* waits specified delay value and resets timestamp */
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void udelay_masked (unsigned long usec)
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{
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ulong tmo;
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ulong endtime;
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signed long diff;
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if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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} else { /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000*1000);
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}
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endtime = get_timer_masked () + tmo;
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do {
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ulong now = get_timer_masked ();
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diff = endtime - now;
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} while (diff >= 0);
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk (void)
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{
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ulong tbclk;
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tbclk = CONFIG_SYS_HZ;
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return tbclk;
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}
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