upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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140 lines
3.2 KiB
140 lines
3.2 KiB
/*
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* (C) Copyright 2001
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* Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* Date & Time support for ST Electronics M48T35Ax RTC
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*/
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/*#define DEBUG */
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#include <common.h>
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#include <command.h>
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#include <rtc.h>
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#include <config.h>
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#if defined(CONFIG_CMD_DATE)
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static uchar rtc_read (uchar reg);
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static void rtc_write (uchar reg, uchar val);
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/* ------------------------------------------------------------------------- */
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int rtc_get (struct rtc_time *tmp)
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{
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uchar sec, min, hour, cent_day, date, month, year;
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uchar ccr; /* Clock control register */
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/* Lock RTC for read using clock control register */
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ccr = rtc_read(0);
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ccr = ccr | 0x40;
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rtc_write(0, ccr);
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sec = rtc_read (0x1);
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min = rtc_read (0x2);
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hour = rtc_read (0x3);
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cent_day= rtc_read (0x4);
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date = rtc_read (0x5);
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month = rtc_read (0x6);
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year = rtc_read (0x7);
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/* UNLock RTC */
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ccr = rtc_read(0);
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ccr = ccr & 0xBF;
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rtc_write(0, ccr);
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debug ( "Get RTC year: %02x month: %02x date: %02x cent_day: %02x "
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"hr: %02x min: %02x sec: %02x\n",
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year, month, date, cent_day,
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hour, min, sec );
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tmp->tm_sec = bcd2bin (sec & 0x7F);
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tmp->tm_min = bcd2bin (min & 0x7F);
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tmp->tm_hour = bcd2bin (hour & 0x3F);
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tmp->tm_mday = bcd2bin (date & 0x3F);
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tmp->tm_mon = bcd2bin (month & 0x1F);
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tmp->tm_year = bcd2bin (year) + ((cent_day & 0x10) ? 2000 : 1900);
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tmp->tm_wday = bcd2bin (cent_day & 0x07);
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tmp->tm_yday = 0;
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tmp->tm_isdst= 0;
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debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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return 0;
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}
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int rtc_set (struct rtc_time *tmp)
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{
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uchar ccr; /* Clock control register */
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uchar century;
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debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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/* Lock RTC for write using clock control register */
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ccr = rtc_read(0);
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ccr = ccr | 0x80;
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rtc_write(0, ccr);
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rtc_write (0x07, bin2bcd(tmp->tm_year % 100));
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rtc_write (0x06, bin2bcd(tmp->tm_mon));
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rtc_write (0x05, bin2bcd(tmp->tm_mday));
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century = ((tmp->tm_year >= 2000) ? 0x10 : 0) | 0x20;
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rtc_write (0x04, bin2bcd(tmp->tm_wday) | century);
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rtc_write (0x03, bin2bcd(tmp->tm_hour));
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rtc_write (0x02, bin2bcd(tmp->tm_min ));
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rtc_write (0x01, bin2bcd(tmp->tm_sec ));
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/* UNLock RTC */
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ccr = rtc_read(0);
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ccr = ccr & 0x7F;
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rtc_write(0, ccr);
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return 0;
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}
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void rtc_reset (void)
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{
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uchar val;
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/* Clear all clock control registers */
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rtc_write (0x0, 0x80); /* No Read Lock or calibration */
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/* Clear stop bit */
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val = rtc_read (0x1);
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val &= 0x7f;
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rtc_write(0x1, val);
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/* Enable century / disable frequency test */
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val = rtc_read (0x4);
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val = (val & 0xBF) | 0x20;
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rtc_write(0x4, val);
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/* Clear write lock */
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rtc_write(0x0, 0);
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}
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/* ------------------------------------------------------------------------- */
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static uchar rtc_read (uchar reg)
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{
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return *(unsigned char *)
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((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg);
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}
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static void rtc_write (uchar reg, uchar val)
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{
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*(unsigned char *)
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((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val;
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}
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#endif
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