upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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60 lines
2.5 KiB
60 lines
2.5 KiB
/*
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* Copyright (C) 2005 Sandburst Corporation
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Ported from i2c driver for ppc4xx by AS HARNOIS by
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* Travis B. Sawyer
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* Sandburst Corporation
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*/
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#include <common.h>
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#include <ppc4xx.h>
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#include <4xx_i2c.h>
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#include <i2c.h>
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#ifdef CONFIG_HARD_I2C
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#define I2C_BUS1_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500)
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#define I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR
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#define IIC_MDBUF1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICMDBUF)
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#define IIC_SDBUF1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICSDBUF)
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#define IIC_LMADR1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICLMADR)
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#define IIC_HMADR1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICHMADR)
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#define IIC_CNTL1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICCNTL)
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#define IIC_MDCNTL1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICMDCNTL)
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#define IIC_STS1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICSTS)
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#define IIC_EXTSTS1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICEXTSTS)
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#define IIC_LSADR1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICLSADR)
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#define IIC_HSADR1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICHSADR)
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#define IIC_CLKDIV1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICCLKDIV)
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#define IIC_INTRMSK1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICINTRMSK)
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#define IIC_XFRCNT1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICXFRCNT)
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#define IIC_XTCNTLSS1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICXTCNTLSS)
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#define IIC_DIRECTCNTL1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICDIRECTCNTL)
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void i2c1_init (int speed, int slaveadd);
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int i2c_probe1 (uchar chip);
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int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
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int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
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uchar i2c_reg_read1(uchar i2c_addr, uchar reg);
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void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val);
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#endif /* CONFIG_HARD_I2C */
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