upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Simon Glass a9aff2f46a x86: dts: Add SPI flash MRC details for chromebook_link ... Correct the SPI flash compatible string, add an alias and specify the position of the MRC cache, used to store SDRAM training settings for the Memory Reference Code. Signed-off-by: Simon Glass <sjg@chromium.org>		10 years ago
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include	…
microcode	…
.gitignore	…
Makefile	x86: Make chromebook_link the default board for coreboot	10 years ago
chromebook_link.dts	x86: dts: Add SPI flash MRC details for chromebook_link	10 years ago
crownbay.dts	…
serial.dtsi	…
skeleton.dtsi	…