upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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York Sun 56848428a8 drivers/ddr/fsl: Adjust bstopre value ... By default the bstopre value has been set to 0x100, used to be 1/4 value of refint. Modern DDR has increased the refresh time. Adjust to 1/4 of refresh interval dynamically. Individual board can still override this value in board ddr file, or to use auto-precharge. Signed-off-by: York Sun <yorksun@freescale.com>		9 years ago
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fsl	drivers/ddr/fsl: Adjust bstopre value	9 years ago
marvell	arm: mvebu: a38x: Use correct PEX register access macros	9 years ago