upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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73 lines
1.9 KiB
73 lines
1.9 KiB
/*
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* emif definitions to re-use davinci emif driver on Keystone2
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*
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* (C) Copyright 2012-2014
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* Texas Instruments Incorporated, <www.ti.com>
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* (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _EMIF_DEFS_H_
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#define _EMIF_DEFS_H_
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#include <asm/arch/hardware.h>
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struct davinci_emif_regs {
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uint32_t ercsr;
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uint32_t awccr;
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uint32_t sdbcr;
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uint32_t sdrcr;
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uint32_t abncr[4];
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uint32_t sdtimr;
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uint32_t ddrsr;
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uint32_t ddrphycr;
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uint32_t ddrphysr;
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uint32_t totar;
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uint32_t totactr;
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uint32_t ddrphyid_rev;
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uint32_t sdsretr;
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uint32_t eirr;
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uint32_t eimr;
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uint32_t eimsr;
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uint32_t eimcr;
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uint32_t ioctrlr;
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uint32_t iostatr;
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uint32_t rsvd0;
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uint32_t one_nand_cr;
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uint32_t nandfcr;
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uint32_t nandfsr;
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uint32_t rsvd1[2];
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uint32_t nandfecc[4];
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uint32_t rsvd2[15];
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uint32_t nand4biteccload;
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uint32_t nand4bitecc[4];
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uint32_t nanderradd1;
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uint32_t nanderradd2;
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uint32_t nanderrval1;
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uint32_t nanderrval2;
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};
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#define davinci_emif_regs \
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((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
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#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << ((n) - 2))
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#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
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#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) (((n) - 2) << 4)
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#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + ((n) - 2)))
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#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
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#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
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/* Chip Select setup */
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#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
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#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
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#define DAVINCI_ABCR_WSETUP(n) ((n) << 26)
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#define DAVINCI_ABCR_WSTROBE(n) ((n) << 20)
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#define DAVINCI_ABCR_WHOLD(n) ((n) << 17)
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#define DAVINCI_ABCR_RSETUP(n) ((n) << 13)
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#define DAVINCI_ABCR_RSTROBE(n) ((n) << 7)
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#define DAVINCI_ABCR_RHOLD(n) ((n) << 4)
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#define DAVINCI_ABCR_TA(n) ((n) << 2)
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#define DAVINCI_ABCR_ASIZE_16BIT 1
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#define DAVINCI_ABCR_ASIZE_8BIT 0
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#endif
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