upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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55 lines
1.1 KiB
55 lines
1.1 KiB
/*
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* Copyright (C) 2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CLK_UNIPHIER_H__
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#define __CLK_UNIPHIER_H__
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#include <linux/kernel.h>
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#define UNIPHIER_CLK_MAX_NR_MUXS 8
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struct uniphier_clk_gate_data {
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unsigned int id;
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unsigned int reg;
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unsigned int bit;
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};
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struct uniphier_clk_mux_data {
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unsigned int id;
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unsigned int nr_muxs;
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unsigned int reg;
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unsigned int masks[UNIPHIER_CLK_MAX_NR_MUXS];
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unsigned int vals[UNIPHIER_CLK_MAX_NR_MUXS];
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unsigned long rates[UNIPHIER_CLK_MAX_NR_MUXS];
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};
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struct uniphier_clk_data {
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const struct uniphier_clk_gate_data *gate;
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const struct uniphier_clk_mux_data *mux;
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};
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#define UNIPHIER_CLK_ID_END (unsigned int)(-1)
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#define UNIPHIER_CLK_END \
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{ .id = UNIPHIER_CLK_ID_END }
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#define UNIPHIER_CLK_GATE(_id, _reg, _bit) \
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{ \
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.id = (_id), \
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.reg = (_reg), \
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.bit = (_bit), \
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}
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#define UNIPHIER_CLK_FIXED_RATE(_id, _rate) \
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{ \
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.id = (_id), \
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.rates = {(_reg),}, \
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}
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extern const struct uniphier_clk_data uniphier_mio_clk_data;
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#endif /* __CLK_UNIPHIER_H__ */
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