upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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293 lines
10 KiB
293 lines
10 KiB
/*
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* Boot ROM Entry Points and such
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*/
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/* These Blackfins all have a Boot ROM that is not reusable (at all):
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* BF531 / BF532 / BF533
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* BF538 / BF539
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* BF561
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* So there is nothing for us to export ;(
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*
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* These Blackfins started to roll with the idea that the Boot ROM can
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* provide useful functions, but still only a few (and not really useful):
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* BF534 / BF536 / BF537
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*
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* Looking forward, Boot ROM's on newer Blackfins have quite a few
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* nice entry points that are usable at runtime and beyond. We'll
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* only define known legacy parts (listed above) and otherwise just
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* assume it's a newer part.
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*
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* These entry points are accomplished by placing a small jump table at
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* the start of the Boot ROM. This way the addresses are fixed forever.
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*/
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#ifndef __BFIN_PERIPHERAL_BOOTROM__
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#define __BFIN_PERIPHERAL_BOOTROM__
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/* All Blackfin's have the Boot ROM entry point at the same address */
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#define _BOOTROM_RESET 0xEF000000
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#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
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defined(__ADSPBF538__) || defined(__ADSPBF539__) || \
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defined(__ADSPBF561__)
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/* Nothing to export */
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#elif defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__)
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/* The BF537 family */
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#define _BOOTROM_FINAL_INIT 0xEF000002
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/* reserved 0xEF000004 */
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#define _BOOTROM_DO_MEMORY_DMA 0xEF000006
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#define _BOOTROM_BOOT_DXE_FLASH 0xEF000008
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#define _BOOTROM_BOOT_DXE_SPI 0xEF00000A
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#define _BOOTROM_BOOT_DXE_TWI 0xEF00000C
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/* reserved 0xEF00000E */
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#define _BOOTROM_GET_DXE_ADDRESS_FLASH 0xEF000010
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#define _BOOTROM_GET_DXE_ADDRESS_SPI 0xEF000012
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#define _BOOTROM_GET_DXE_ADDRESS_TWI 0xEF000014
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/* reserved 0xEF000016 */
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/* reserved 0xEF000018 */
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/* Glue to newer Boot ROMs */
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#define _BOOTROM_MDMA _BOOTROM_DO_MEMORY_DMA
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#define _BOOTROM_MEMBOOT _BOOTROM_BOOT_DXE_FLASH
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#define _BOOTROM_SPIBOOT _BOOTROM_BOOT_DXE_FLASH
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#define _BOOTROM_TWIBOOT _BOOTROM_BOOT_DXE_TWI
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#else
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/* All the newer Boot ROMs */
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#define _BOOTROM_FINAL_INIT 0xEF000002
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#define _BOOTROM_PDMA 0xEF000004
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#define _BOOTROM_MDMA 0xEF000006
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#define _BOOTROM_MEMBOOT 0xEF000008
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#define _BOOTROM_SPIBOOT 0xEF00000A
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#define _BOOTROM_TWIBOOT 0xEF00000C
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/* reserved 0xEF00000E */
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/* reserved 0xEF000010 */
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/* reserved 0xEF000012 */
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/* reserved 0xEF000014 */
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/* reserved 0xEF000016 */
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#define _BOOTROM_OTP_COMMAND 0xEF000018
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#define _BOOTROM_OTP_READ 0xEF00001A
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#define _BOOTROM_OTP_WRITE 0xEF00001C
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#define _BOOTROM_ECC_TABLE 0xEF00001E
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#define _BOOTROM_BOOTKERNEL 0xEF000020
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#define _BOOTROM_GETPORT 0xEF000022
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#define _BOOTROM_NMI 0xEF000024
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#define _BOOTROM_HWERROR 0xEF000026
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#define _BOOTROM_EXCEPTION 0xEF000028
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#define _BOOTROM_CRC32 0xEF000030
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#define _BOOTROM_CRC32POLY 0xEF000032
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#define _BOOTROM_CRC32CALLBACK 0xEF000034
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#define _BOOTROM_CRC32INITCODE 0xEF000036
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#define _BOOTROM_SYSCONTROL 0xEF000038
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#define _BOOTROM_REV 0xEF000040
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#define _BOOTROM_SESR 0xEF001000
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#define BOOTROM_FOLLOWS_C_ABI 1
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#define BOOTROM_CAPS_ADI_BOOT_STRUCTS 1
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#endif
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#ifndef BOOTROM_FOLLOWS_C_ABI
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#define BOOTROM_FOLLOWS_C_ABI 0
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#endif
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#ifndef BOOTROM_CAPS_ADI_BOOT_STRUCTS
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#define BOOTROM_CAPS_ADI_BOOT_STRUCTS 0
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#endif
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/* Possible syscontrol action flags */
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#define SYSCTRL_READ 0x00000000 /* read registers */
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#define SYSCTRL_WRITE 0x00000001 /* write registers */
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#define SYSCTRL_SYSRESET 0x00000002 /* perform system reset */
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#define SYSCTRL_CORERESET 0x00000004 /* perform core reset */
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#define SYSCTRL_SOFTRESET 0x00000006 /* perform core and system reset */
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#define SYSCTRL_VRCTL 0x00000010 /* read/write VR_CTL register */
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#define SYSCTRL_EXTVOLTAGE 0x00000020 /* VDDINT supplied externally */
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#define SYSCTRL_INTVOLTAGE 0x00000000 /* VDDINT generated by on-chip regulator */
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#define SYSCTRL_OTPVOLTAGE 0x00000040 /* For Factory Purposes Only */
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#define SYSCTRL_PLLCTL 0x00000100 /* read/write PLL_CTL register */
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#define SYSCTRL_PLLDIV 0x00000200 /* read/write PLL_DIV register */
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#define SYSCTRL_LOCKCNT 0x00000400 /* read/write PLL_LOCKCNT register */
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#define SYSCTRL_PLLSTAT 0x00000800 /* read/write PLL_STAT register */
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#ifndef __ASSEMBLY__
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#if BOOTROM_FOLLOWS_C_ABI
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# define BOOTROM_CALLED_FUNC_ATTR
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#else
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# define BOOTROM_CALLED_FUNC_ATTR __attribute__((saveall))
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#endif
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/* Structures for the syscontrol() function */
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typedef struct ADI_SYSCTRL_VALUES {
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uint16_t uwVrCtl;
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uint16_t uwPllCtl;
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uint16_t uwPllDiv;
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uint16_t uwPllLockCnt;
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uint16_t uwPllStat;
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} ADI_SYSCTRL_VALUES;
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#ifndef _BOOTROM_SYSCONTROL
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#define _BOOTROM_SYSCONTROL 0
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#endif
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static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_settings, void *reserved) = (void *)_BOOTROM_SYSCONTROL;
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/* We need a dedicated function since we need to screw with the stack pointer
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* when resetting. The on-chip ROM will save/restore registers on the stack
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* when doing a system reset, so the stack cannot be outside of the chip.
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*/
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__attribute__((__noreturn__))
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static inline void bfrom_SoftReset(void *new_stack)
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{
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while (1)
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__asm__ __volatile__(
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"sp = %[stack];"
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"jump (%[bfrom_syscontrol]);"
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: : [bfrom_syscontrol] "p"(bfrom_SysControl),
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"q0"(SYSCTRL_SOFTRESET),
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"q1"(0),
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"q2"(NULL),
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[stack] "p"(new_stack)
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);
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}
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/* Structures for working with LDRs and boot rom callbacks */
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typedef struct ADI_BOOT_HEADER {
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int32_t dBlockCode;
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void *pTargetAddress;
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int32_t dByteCount;
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int32_t dArgument;
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} ADI_BOOT_HEADER;
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typedef struct ADI_BOOT_BUFFER {
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void *pSource;
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int32_t dByteCount;
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} ADI_BOOT_BUFFER;
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typedef struct ADI_BOOT_DATA {
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void *pSource;
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void *pDestination;
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int16_t *pControlRegister;
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int16_t *pDmaControlRegister;
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int32_t dControlValue;
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int32_t dByteCount;
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int32_t dFlags;
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int16_t uwDataWidth;
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int16_t uwSrcModifyMult;
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int16_t uwDstModifyMult;
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int16_t uwHwait;
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int16_t uwSsel;
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int16_t uwUserShort;
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int32_t dUserLong;
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int32_t dReserved2;
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void *pErrorFunction;
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void *pLoadFunction;
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void *pCallBackFunction;
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ADI_BOOT_HEADER *pHeader;
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void *pTempBuffer;
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void *pTempCurrent;
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int32_t dTempByteCount;
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int32_t dBlockCount;
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int32_t dClock;
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void *pLogBuffer;
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void *pLogCurrent;
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int32_t dLogByteCount;
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} ADI_BOOT_DATA;
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typedef void ADI_BOOT_HOOK_FUNC (ADI_BOOT_DATA *);
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#ifndef _BOOTROM_MEMBOOT
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#define _BOOTROM_MEMBOOT 0
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#endif
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static uint32_t (* const bfrom_MemBoot)(void *pBootStream, int32_t dFlags, int32_t dBlockCount, ADI_BOOT_HOOK_FUNC *pCallHook) = (void *)_BOOTROM_MEMBOOT;
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#ifndef _BOOTROM_TWIBOOT
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#define _BOOTROM_TWIBOOT 0
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#endif
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static uint32_t (* const bfrom_TwiBoot)(int32_t dTwiAddress, int32_t dFlags, int32_t dBlockCount, ADI_BOOT_HOOK_FUNC *pCallHook) = (void *)_BOOTROM_TWIBOOT;
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#ifndef _BOOTROM_SPIBOOT
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#define _BOOTROM_SPIBOOT 0
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#endif
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static uint32_t (* const bfrom_SpiBoot)(int32_t dSpiAddress, int32_t dFlags, int32_t dBlockCount, ADI_BOOT_HOOK_FUNC *pCallHook) = (void *)_BOOTROM_SPIBOOT;
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#ifndef _BOOTROM_OTPBOOT
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#define _BOOTROM_OTPBOOT 0
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#endif
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static uint32_t (* const bfrom_OtpBoot)(int32_t dOtpAddress, int32_t dFlags, int32_t dBlockCount, ADI_BOOT_HOOK_FUNC *pCallHook) = (void *)_BOOTROM_OTPBOOT;
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#ifndef _BOOTROM_NANDBOOT
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#define _BOOTROM_NANDBOOT 0
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#endif
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static uint32_t (* const bfrom_NandBoot)(int32_t dNandAddress, int32_t dFlags, int32_t dBlockCount, ADI_BOOT_HOOK_FUNC *pCallHook) = (void *)_BOOTROM_NANDBOOT;
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#endif /* __ASSEMBLY__ */
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/* Bit defines for BF53x block flags */
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#define BFLAG_53X_ZEROFILL 0x0001
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#define BFLAG_53X_RESVECT 0x0002
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#define BFLAG_53X_INIT 0x0008
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#define BFLAG_53X_IGNORE 0x0010
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#define BFLAG_53X_PFLAG_MASK 0x01E0
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#define BFLAG_53X_PFLAG_SHIFT 5
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#define BFLAG_53X_PPORT_MASK 0x0600
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#define BFLAG_53X_PPORT_SHIFT 9
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#define BFLAG_53X_COMPRESSED 0x2000
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#define BFLAG_53X_FINAL 0x8000
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/* Bit defines for BF56x global header */
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#define GFLAG_56X_16BIT_FLASH 0x00000001
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#define GFLAG_56X_WAIT_MASK 0x0000001E
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#define GFLAG_56X_WAIT_SHIFT 1
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#define GFLAG_56X_HOLD_MASK 0x000000C0
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#define GFLAG_56X_HOLD_SHIFT 6
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#define GFLAG_56X_SPI_MASK 0x00000700
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#define GFLAG_56X_SPI_SHIFT 8
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#define GFLAG_56X_SPI_500K 0x0
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#define GFLAG_56X_SPI_1M 0x1
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#define GFLAG_56X_SPI_2M 0x2
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#define GFLAG_56X_SIGN_MASK 0xFF000000
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#define GFLAG_56X_SIGN_SHIFT 28
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#define GFLAG_56X_SIGN_MAGIC 0xA
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/* Bit defines for ADI_BOOT_DATA->dFlags */
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#define BFLAG_DMACODE_MASK 0x0000000F
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#define BFLAG_SAFE 0x00000010
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#define BFLAG_AUX 0x00000020
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#define BFLAG_FILL 0x00000100
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#define BFLAG_QUICKBOOT 0x00000200
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#define BFLAG_CALLBACK 0x00000400
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#define BFLAG_INIT 0x00000800
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#define BFLAG_IGNORE 0x00001000
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#define BFLAG_INDIRECT 0x00002000
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#define BFLAG_FIRST 0x00004000
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#define BFLAG_FINAL 0x00008000
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#define BFLAG_HDRSIGN_MASK 0xFF000000
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#define BFLAG_HDRSIGN_SHIFT 24
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#define BFLAG_HDRSIGN_MAGIC 0xAD
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#define BFLAG_HDRCHK_MASK 0x00FF0000
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#define BFLAG_HDRCHK_SHIFT 16
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#define BFLAG_HOOK 0x00400000
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#define BFLAG_HDRINDIRECT 0x00800000
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#define BFLAG_TYPE_MASK 0x00300000
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#define BFLAG_TYPE_1 0x00000000
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#define BFLAG_TYPE_2 0x00100000
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#define BFLAG_TYPE_3 0x00200000
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#define BFLAG_TYPE_4 0x00300000
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#define BFLAG_FASTREAD 0x00400000
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#define BFLAG_NOAUTO 0x01000000
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#define BFLAG_PERIPHERAL 0x02000000
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#define BFLAG_SLAVE 0x04000000
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#define BFLAG_WAKEUP 0x08000000
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#define BFLAG_NEXTDXE 0x10000000
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#define BFLAG_RETURN 0x20000000
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#define BFLAG_RESET 0x40000000
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#define BFLAG_NONRESTORE 0x80000000
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#endif
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