upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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71 lines
2.6 KiB
71 lines
2.6 KiB
/*
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* (C) Copyright 2000
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* Subodh Nijsure, SkyStream Networks, snijsure@skystream.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <mpc8xx.h>
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#include <asm/io.h>
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#include <asm/ppc.h>
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void print_reginfo(void)
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{
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immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
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memctl8xx_t __iomem *memctl = &immap->im_memctl;
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sysconf8xx_t __iomem *sysconf = &immap->im_siu_conf;
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sit8xx_t __iomem *timers = &immap->im_sit;
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/* Hopefully more PowerPC knowledgable people will add code to display
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* other useful registers
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*/
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printf("\nSystem Configuration registers\n"
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"\tIMMR\t0x%08X\n", get_immr(0));
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printf("\tSIUMCR\t0x%08X", in_be32(&sysconf->sc_siumcr));
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printf("\tSYPCR\t0x%08X\n", in_be32(&sysconf->sc_sypcr));
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printf("\tSWT\t0x%08X", in_be32(&sysconf->sc_swt));
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printf("\tSWSR\t0x%04X\n", in_be16(&sysconf->sc_swsr));
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printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X\n",
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in_be32(&sysconf->sc_sipend), in_be32(&sysconf->sc_simask));
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printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X\n",
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in_be32(&sysconf->sc_siel), in_be32(&sysconf->sc_sivec));
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printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n",
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in_be32(&sysconf->sc_tesr), in_be32(&sysconf->sc_sdcr));
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printf("Memory Controller Registers\n");
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printf("\tBR0\t0x%08X\tOR0\t0x%08X\n", in_be32(&memctl->memc_br0),
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in_be32(&memctl->memc_or0));
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printf("\tBR1\t0x%08X\tOR1\t0x%08X\n", in_be32(&memctl->memc_br1),
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in_be32(&memctl->memc_or1));
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printf("\tBR2\t0x%08X\tOR2\t0x%08X\n", in_be32(&memctl->memc_br2),
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in_be32(&memctl->memc_or2));
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printf("\tBR3\t0x%08X\tOR3\t0x%08X\n", in_be32(&memctl->memc_br3),
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in_be32(&memctl->memc_or3));
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printf("\tBR4\t0x%08X\tOR4\t0x%08X\n", in_be32(&memctl->memc_br4),
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in_be32(&memctl->memc_or4));
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printf("\tBR5\t0x%08X\tOR5\t0x%08X\n", in_be32(&memctl->memc_br5),
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in_be32(&memctl->memc_or5));
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printf("\tBR6\t0x%08X\tOR6\t0x%08X\n", in_be32(&memctl->memc_br6),
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in_be32(&memctl->memc_or6));
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printf("\tBR7\t0x%08X\tOR7\t0x%08X\n", in_be32(&memctl->memc_br7),
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in_be32(&memctl->memc_or7));
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printf("\n\tmamr\t0x%08X\tmbmr\t0x%08X\n", in_be32(&memctl->memc_mamr),
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in_be32(&memctl->memc_mbmr));
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printf("\tmstat\t0x%04X\tmptpr\t0x%04X\n", in_be16(&memctl->memc_mstat),
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in_be16(&memctl->memc_mptpr));
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printf("\tmdr\t0x%08X\n", in_be32(&memctl->memc_mdr));
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printf("\nSystem Integration Timers\n");
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printf("\tTBSCR\t0x%04X\tRTCSC\t0x%04X\n",
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in_be16(&timers->sit_tbscr), in_be16(&timers->sit_rtcsc));
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printf("\tPISCR\t0x%04X\n", in_be16(&timers->sit_piscr));
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/*
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* May be some CPM info here?
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*/
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}
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