upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

York Sun c3678b0937 powerpc/mpc85xx: Add workaround for erratum A007212 ... Erratum A007212 for DDR is about a runaway condition for DDR PLL oscilliator. Please refer to erratum document for detail. For this workaround to work, DDR PLL needs to be disabled in RCW. However, u-boot needs to know the expected PLL ratio. We put the ratio in a reserved field RCW[18:23]. U-boot will skip this workaround if DDR PLL ratio is set, or the reserved field is not set. Workaround for erratum A007212 applies to selected versions of B4/T4 SoCs. It is safe to apply the workaround to all versions. It is helpful for upgrading SoC without changing u-boot. In case DDR PLL is disabled by RCW (part of the erratum workaround), we need this u-boot workround to bring up DDR clock. Signed-off-by: York Sun <yorksun@freescale.com>		11 years ago
..
cpu	powerpc/mpc85xx: Add workaround for erratum A007212	11 years ago
include/asm	powerpc/mpc85xx: Add workaround for erratum A007212	11 years ago
lib	Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx	11 years ago
config.mk	kbuild: move "checkgcc4" to PowerPC archprepare	11 years ago